Index: /webserver/example/freeRTOS/Demo/ARM7_LPC2368_Rowley/webserver/emac.c =================================================================== --- /webserver/example/freeRTOS/Demo/ARM7_LPC2368_Rowley/webserver/emac.c (revision 14) +++ /webserver/example/freeRTOS/Demo/ARM7_LPC2368_Rowley/webserver/emac.c (revision 15) @@ -42,11 +42,11 @@ unsigned int tout; - MADR = DP83848C_DEF_ADR | PhyReg; - MWTD = Value; + MAC_MADR = DP83848C_DEF_ADR | PhyReg; + MAC_MWTD = Value; /* Wait utill operation completed */ tout = 0; for (tout = 0; tout < MII_WR_TOUT; tout++) { - if ((MIND & MIND_BUSY) == 0) { + if ((MAC_MIND & MIND_BUSY) == 0) { break; } @@ -60,16 +60,16 @@ unsigned int tout; - MADR = DP83848C_DEF_ADR | PhyReg; - MCMD = MCMD_READ; + MAC_MADR = DP83848C_DEF_ADR | PhyReg; + MAC_MCMD = MCMD_READ; /* Wait until operation completed */ tout = 0; for (tout = 0; tout < MII_RD_TOUT; tout++) { - if ((MIND & MIND_BUSY) == 0) { + if ((MAC_MIND & MIND_BUSY) == 0) { break; } } - MCMD = 0; - return (MRDD); + MAC_MCMD = 0; + return (MAC_MRDD); } @@ -88,10 +88,10 @@ /* Set EMAC Receive Descriptor Registers. */ - RxDescriptor = RX_DESC_BASE; - RxStatus = RX_STAT_BASE; - RxDescriptorNumber = NUM_RX_FRAG-1; + MAC_RXDESCRIPTOR = RX_DESC_BASE; + MAC_RXSTATUS = RX_STAT_BASE; + MAC_RXDESCRIPTORNUM = NUM_RX_FRAG-1; /* Rx Descriptors Point to 0 */ - RxConsumeIndex = 0; + MAC_RXCONSUMEINDEX = 0; } @@ -108,10 +108,10 @@ /* Set EMAC Transmit Descriptor Registers. */ - TxDescriptor = TX_DESC_BASE; - TxStatus = TX_STAT_BASE; - TxDescriptorNumber = NUM_TX_FRAG-1; + MAC_TXDESCRIPTOR = TX_DESC_BASE; + MAC_TXSTATUS = TX_STAT_BASE; + MAC_TXDESCRIPTORNUM = NUM_TX_FRAG-1; /* Tx Descriptors Point to 0 */ - TxProduceIndex = 0; + MAC_TXPRODUCEINDEX = 0; } @@ -137,7 +137,7 @@ /* Reset all EMAC internal modules. */ - MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX | + MAC_MAC1 = MAC1_RES_TX | MAC1_RES_MCS_TX | MAC1_RES_RX | MAC1_RES_MCS_RX | MAC1_SIM_RES | MAC1_SOFT_RES; - Command = CR_REG_RES | CR_TX_RES | CR_RX_RES; + MAC_COMMAND = CR_REG_RES | CR_TX_RES | CR_RX_RES; /* A short delay after reset. */ @@ -145,16 +145,16 @@ /* Initialize MAC control registers. */ - MAC1 = MAC1_PASS_ALL; - MAC2 = MAC2_CRC_EN | MAC2_PAD_EN; - MAXF = ETH_MAX_FLEN; - CLRT = CLRT_DEF; - IPGR = IPGR_DEF; + MAC_MAC1 = MAC1_PASS_ALL; + MAC_MAC2 = MAC2_CRC_EN | MAC2_PAD_EN; + MAC_MAXF = ETH_MAX_FLEN; + MAC_CLRT = CLRT_DEF; + MAC_IPGR = IPGR_DEF; /* Enable Reduced MII interface. */ - Command = CR_RMII | CR_PASS_RUNT_FRM; + MAC_COMMAND = CR_RMII | CR_PASS_RUNT_FRM; /* Reset Reduced MII Logic. */ - SUPP = SUPP_RES_RMII; - SUPP = 0; + MAC_SUPP = SUPP_RES_RMII; + MAC_SUPP = 0; /* Put the DP83848C in reset mode */ @@ -215,11 +215,11 @@ if (regv & 0x0004) { /* Full duplex is enabled. */ - MAC2 |= MAC2_FULL_DUP; - Command |= CR_FULL_DUP; - IPGT = IPGT_FULL_DUP; + MAC_MAC2 |= MAC2_FULL_DUP; + MAC_COMMAND |= CR_FULL_DUP; + MAC_IPGT = IPGT_FULL_DUP; } else { /* Half duplex mode. */ - IPGT = IPGT_HALF_DUP; + MAC_IPGT = IPGT_HALF_DUP; } @@ -227,15 +227,15 @@ if (regv & 0x0002) { /* 10MBit mode. */ - SUPP = 0; + MAC_SUPP = 0; } else { /* 100MBit mode. */ - SUPP = SUPP_SPEED; + MAC_SUPP = SUPP_SPEED; } /* Set the Ethernet MAC Address registers */ - SA0 = (emacETHADDR0 << 8) | emacETHADDR1; - SA1 = (emacETHADDR2 << 8) | emacETHADDR3; - SA2 = (emacETHADDR4 << 8) | emacETHADDR5; + MAC_SA0 = (emacETHADDR0 << 8) | emacETHADDR1; + MAC_SA1 = (emacETHADDR2 << 8) | emacETHADDR3; + MAC_SA2 = (emacETHADDR4 << 8) | emacETHADDR5; /* Initialize Tx and Rx DMA Descriptors */ @@ -244,5 +244,5 @@ /* Receive Broadcast and Perfect Match Packets */ - RxFilterCtrl = RFC_UCAST_EN | RFC_BCAST_EN | RFC_PERFECT_EN; + MAC_RXFILTERCTRL = RFC_UCAST_EN | RFC_BCAST_EN | RFC_PERFECT_EN; /* Create the semaphore used ot wake the uIP task. */ @@ -250,9 +250,9 @@ /* Reset all interrupts */ - IntClear = 0xFFFF; + MAC_INTCLEAR = 0xFFFF; /* Enable receive and transmit mode of MAC Ethernet core */ - Command |= (CR_RX_EN | CR_TX_EN); - MAC1 |= MAC1_REC_EN; + MAC_COMMAND |= (CR_RX_EN | CR_TX_EN); + MAC_MAC1 |= MAC1_REC_EN; } @@ -319,5 +319,5 @@ unsigned int idx; - idx = RxConsumeIndex; + idx = MAC_RXCONSUMEINDEX; RxLen = (RX_STAT_INFO(idx) & RINFO_SIZE) - 3; rptr = (unsigned short *)RX_DESC_PACKET(idx); @@ -329,15 +329,15 @@ /* DMA free packet. */ - idx = RxConsumeIndex; + idx = MAC_RXCONSUMEINDEX; if (++idx == NUM_RX_FRAG) idx = 0; - RxConsumeIndex = idx; + MAC_RXCONSUMEINDEX = idx; } unsigned int CheckFrameReceived(void) { // Packet received ? - if (RxProduceIndex != RxConsumeIndex) // more packets received ? + if (MAC_RXPRODUCEINDEX != MAC_RXCONSUMEINDEX) // more packets received ? return(1); else @@ -349,5 +349,5 @@ unsigned int uiLen = 0; - if( RxProduceIndex != RxConsumeIndex ) + if( MAC_RXPRODUCEINDEX != MAC_RXCONSUMEINDEX ) { uiLen = StartReadFrame(); @@ -365,5 +365,5 @@ unsigned int idx; - idx = TxProduceIndex; + idx = MAC_TXPRODUCEINDEX; tptr = (unsigned short *)TX_DESC_PACKET(idx); } @@ -405,8 +405,8 @@ unsigned int idx; - idx = TxProduceIndex; + idx = MAC_TXPRODUCEINDEX; TX_DESC_CTRL(idx) = FrameSize | TCTRL_LAST; if (++idx == NUM_TX_FRAG) idx = 0; - TxProduceIndex = idx; -} - + MAC_TXPRODUCEINDEX = idx; +} +