Archive member included because of file (symbol) /home/phil/CrossWorks_ARM_1_7/lib/liblpc2000_v4t_a_le.a(liblpc2000_lpc23xx_get_cclk.o) ARM RAM Debug/LPC230x.o (liblpc2000_lpc23xx_get_cclk) /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__int32_udivmod.o) /home/phil/CrossWorks_ARM_1_7/lib/liblpc2000_v4t_a_le.a(liblpc2000_lpc23xx_get_cclk.o) (__udivsi3) /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcpy.o) ARM RAM Debug/easyweb.o (memcpy) /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memset.o) ARM RAM Debug/tcpip.o (memset) /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcmp.o) ARM RAM Debug/tcpip.o (memcmp) /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(sprintf.o) ARM RAM Debug/easyweb.o (sprintf) /home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le.a(__vfprintf_long.o) /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(sprintf.o) (__vfprintf) /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(strlen.o) /home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le.a(__vfprintf_long.o) (strlen) /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__hex_lc_uc.o) /home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le.a(__vfprintf_long.o) (__hex_uc) Allocating common symbols Common symbol size file TCPTimer 0x1 ARM RAM Debug/easyweb.o HTTPBytesToSend 0x4 ARM RAM Debug/easyweb.o TCPRxDataCount 0x2 ARM RAM Debug/easyweb.o HTTPStatus 0x1 ARM RAM Debug/easyweb.o TCPTxDataCount 0x2 ARM RAM Debug/easyweb.o RecdFrameIP 0x4 ARM RAM Debug/easyweb.o RemoteMAC 0x6 ARM RAM Debug/easyweb.o TCPStateMachine 0x4 ARM RAM Debug/easyweb.o TCPUNASeqNr 0x4 ARM RAM Debug/easyweb.o TCPLocalPort 0x2 ARM RAM Debug/easyweb.o _RxTCPBuffer 0x100 ARM RAM Debug/easyweb.o TCPFlags 0x1 ARM RAM Debug/easyweb.o RecdFrameMAC 0x6 ARM RAM Debug/easyweb.o RecdIPFrameLength 0x2 ARM RAM Debug/easyweb.o PWebSide 0x4 ARM RAM Debug/easyweb.o RemoteIP 0x4 ARM RAM Debug/easyweb.o LastFrameSent 0x4 ARM RAM Debug/easyweb.o TCPRemotePort 0x2 ARM RAM Debug/easyweb.o TxFrame2Size 0x1 ARM RAM Debug/easyweb.o TCPAckNr 0x4 ARM RAM Debug/easyweb.o TransmitControl 0x1 ARM RAM Debug/easyweb.o TxFrame1Size 0x2 ARM RAM Debug/easyweb.o ISNGenHigh 0x2 ARM RAM Debug/easyweb.o _TxFrame2 0x4a ARM RAM Debug/easyweb.o RecdFrameLength 0x2 ARM RAM Debug/easyweb.o _TxFrame1 0x236 ARM RAM Debug/easyweb.o TCPSeqNr 0x4 ARM RAM Debug/easyweb.o RetryCounter 0x1 ARM RAM Debug/easyweb.o SocketStatus 0x1 ARM RAM Debug/easyweb.o Memory Configuration Name Origin Length Attributes UNPLACED_SECTIONS 0xffffffff 0x00000000 xw AHB_Peripherals 0xffe00000 0x00200000 xw Battery_RAM 0xe0084000 0x00000800 xw APB_Peripherals 0xe0000000 0x00200000 xw USB_RAM 0x7fd00000 0x00002000 xw Ethernet_RAM 0x7fe00000 0x00004000 xw SRAM 0x40000000 0x00008000 xw FLASH 0x00000000 0x00080000 xr *default* 0x00000000 0xffffffff Linker script and memory map 0xffe00000 __AHB_Peripherals_segment_start__ = 0xffe00000 0x00000000 __AHB_Peripherals_segment_end__ = 0x0 0xe0084000 __Battery_RAM_segment_start__ = 0xe0084000 0xe0084800 __Battery_RAM_segment_end__ = 0xe0084800 0xe0000000 __APB_Peripherals_segment_start__ = 0xe0000000 0xe0200000 __APB_Peripherals_segment_end__ = 0xe0200000 0x7fd00000 __USB_RAM_segment_start__ = 0x7fd00000 0x7fd02000 __USB_RAM_segment_end__ = 0x7fd02000 0x7fe00000 __Ethernet_RAM_segment_start__ = 0x7fe00000 0x7fe04000 __Ethernet_RAM_segment_end__ = 0x7fe04000 0x40000000 __SRAM_segment_start__ = 0x40000000 0x40008000 __SRAM_segment_end__ = 0x40008000 0x00000000 __FLASH_segment_start__ = 0x0 0x00080000 __FLASH_segment_end__ = 0x80000 0x00000400 __STACKSIZE__ = 0x400 0x00000100 __STACKSIZE_IRQ__ = 0x100 0x00000100 __STACKSIZE_FIQ__ = 0x100 0x00000000 __STACKSIZE_SVC__ = 0x0 0x00000000 __STACKSIZE_ABT__ = 0x0 0x00000000 __STACKSIZE_UND__ = 0x0 0x00000400 __HEAPSIZE__ = 0x400 0x40000000 __vectors_load_start__ = __SRAM_segment_start__ .vectors 0x40000000 0x38 0x40000000 __vectors_start__ = . *(.vectors .vectors.*) .vectors 0x40000000 0x38 ARM RAM Debug/Philips_LPC230X_Startup.o 0x40000000 _vectors 0x40000038 __vectors_end__ = (__vectors_start__ + SIZEOF (.vectors)) 0x00000001 . = ASSERT (((__vectors_end__ >= __SRAM_segment_start__) && (__vectors_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .vectors is too large to fit in SRAM memory segment) 0x40000038 __fast_load_start__ = (__vectors_end__ ALIGN 0x4) .fast 0x40000038 0x0 0x40000038 __fast_start__ = . *(.fast .fast.*) 0x40000038 __fast_end__ = (__fast_start__ + SIZEOF (.fast)) 0x00000001 . = ASSERT (((__fast_end__ >= __SRAM_segment_start__) && (__fast_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .fast is too large to fit in SRAM memory segment) 0x40000038 __init_load_start__ = (__fast_end__ ALIGN 0x4) .init 0x40000038 0x2e0 0x40000038 __init_start__ = . *(.init .init.*) *fill* 0x40000038 0x8 00 .init 0x40000040 0x1d0 ARM RAM Debug/crt0.o 0x40000040 __start 0x40000040 _start .init 0x40000210 0x108 ARM RAM Debug/Philips_LPC230X_Startup.o 0x40000210 reset_handler 0x400002fc undef_handler 0x40000304 pabort_handler 0x40000308 dabort_handler 0x40000300 swi_handler 0x4000030c fiq_handler 0x40000318 __init_end__ = (__init_start__ + SIZEOF (.init)) 0x00000001 . = ASSERT (((__init_end__ >= __SRAM_segment_start__) && (__init_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .init is too large to fit in SRAM memory segment) 0x40000318 __text_load_start__ = (__init_end__ ALIGN 0x4) .text 0x40000318 0x4458 0x40000318 __text_start__ = . *(.text .text.* .glue_7t .glue_7 .gnu.linkonce.t.* .gcc_except_table) .text 0x40000318 0x474 ARM RAM Debug/easyweb.o 0x40000688 InsertDynamicValues 0x400005ec GetAD0Val 0x400003cc HTTPServer 0x40000318 main .glue_7 0x4000078c 0x0 ARM RAM Debug/easyweb.o .glue_7t 0x4000078c 0x0 ARM RAM Debug/easyweb.o .text 0x4000078c 0xcac ARM RAM Debug/EMAC.o 0x4000132c WriteFrame_EMAC 0x40001128 StartReadFrame 0x40000fc4 ReadFrame_EMAC 0x4000078c write_PHY 0x40001058 CopyFromFrame_EMAC 0x4000082c read_PHY 0x400011c4 EndReadFrame 0x40001004 ReadFrameBE_EMAC 0x4000130c Rdy4Tx 0x400008fc rx_descr_init 0x400010e4 DummyReadFrame_EMAC 0x40001370 CopyToFrame_EMAC 0x40000a2c tx_descr_init 0x40000b48 Init_EMAC 0x40001228 CheckFrameReceived 0x40001288 RequestSend .glue_7 0x40001438 0x0 ARM RAM Debug/EMAC.o .glue_7t 0x40001438 0x0 ARM RAM Debug/EMAC.o .text 0x40001438 0x0 ARM RAM Debug/Retarget.o .glue_7 0x40001438 0x0 ARM RAM Debug/Retarget.o .glue_7t 0x40001438 0x0 ARM RAM Debug/Retarget.o .text 0x40001438 0x23ec ARM RAM Debug/tcpip.o 0x400034f0 TCPHandleRetransmission 0x400035e8 TCPClockHandler 0x400034c0 TCPStopTimer 0x40001c04 ProcessEthBroadcastFrame 0x40001760 IsBroadcast 0x400014d0 TCPPassiveOpen 0x40003244 CalcChecksum 0x4000180c DoNetworkStuff 0x400015c4 TCPClose 0x4000357c TCPHandleTimeout 0x40001680 TCPTransmitTxBuffer 0x40002c48 PrepareTCP_FRAME 0x40002fd4 PrepareTCP_DATA_FRAME 0x40001ee8 ProcessTCPFrame 0x40002a10 PrepareICMP_ECHO_REPLY 0x400028c0 PrepareARP_ANSWER 0x40001ce0 ProcessEthIAFrame 0x40001530 TCPActiveOpen 0x40003440 TCPStartTimeWaitTimer 0x40003730 WriteDWBE 0x400036d0 WriteWBE 0x400037c4 SwapBytes 0x40003498 TCPRestartTimer 0x40003698 SendFrame2 0x400033d4 TCPStartRetryTimer 0x40001438 TCPLowLevelInit 0x40001e9c ProcessICMPFrame 0x40001650 TCPReleaseRxBuffer 0x40003660 SendFrame1 0x400026e0 PrepareARP_REQUEST .glue_7 0x40003824 0x0 ARM RAM Debug/tcpip.o .glue_7t 0x40003824 0x0 ARM RAM Debug/tcpip.o .text 0x40003824 0x40 ARM RAM Debug/catch_irqs.o 0x40003824 irq_handler() 0x40003844 swi_handler() 0x40003834 fiq_handler() 0x40003854 undef_handler() .glue_7 0x40003864 0x0 ARM RAM Debug/catch_irqs.o .glue_7t 0x40003864 0x0 ARM RAM Debug/catch_irqs.o .text 0x40003864 0x0 ARM RAM Debug/crt0.o .glue_7 0x40003864 0x0 ARM RAM Debug/crt0.o .glue_7t 0x40003864 0x0 ARM RAM Debug/crt0.o .text 0x40003864 0x0 ARM RAM Debug/Philips_LPC230X_Startup.o .glue_7 0x40003864 0x0 ARM RAM Debug/Philips_LPC230X_Startup.o .glue_7t 0x40003864 0x0 ARM RAM Debug/Philips_LPC230X_Startup.o .text 0x40003864 0x2fc ARM RAM Debug/LPC230x.o 0x40003b40 ctl_get_ticks_per_second 0x40003a48 ctl_start_timer 0x400038ec get_uart_clk .glue_7 0x40003b60 0x0 ARM RAM Debug/LPC230x.o .glue_7t 0x40003b60 0x0 ARM RAM Debug/LPC230x.o .text 0x40003b60 0x168 ARM RAM Debug/VIC_PL192.o 0x40003c48 ctl_unmask_isr 0x40003b60 ctl_set_isr 0x40003c88 ctl_mask_isr .glue_7 0x40003cc8 0x0 ARM RAM Debug/VIC_PL192.o .glue_7t 0x40003cc8 0x0 ARM RAM Debug/VIC_PL192.o .text 0x40003cc8 0x44 ARM RAM Debug/VIC_PL192_irq_handler.o 0x40003cc8 irq_handler .glue_7 0x40003d0c 0x0 ARM RAM Debug/VIC_PL192_irq_handler.o .glue_7t 0x40003d0c 0x0 ARM RAM Debug/VIC_PL192_irq_handler.o .text 0x40003d0c 0x0 /home/phil/CrossWorks_ARM_1_7/lib/liblpc2000_v4t_a_le.a(liblpc2000_lpc23xx_get_cclk.o) .text.liblpc2000 0x40003d0c 0x98 /home/phil/CrossWorks_ARM_1_7/lib/liblpc2000_v4t_a_le.a(liblpc2000_lpc23xx_get_cclk.o) 0x40003d0c liblpc2000_lpc23xx_get_cclk .glue_7 0x40003da4 0x0 /home/phil/CrossWorks_ARM_1_7/lib/liblpc2000_v4t_a_le.a(liblpc2000_lpc23xx_get_cclk.o) .glue_7t 0x40003da4 0x0 /home/phil/CrossWorks_ARM_1_7/lib/liblpc2000_v4t_a_le.a(liblpc2000_lpc23xx_get_cclk.o) .text 0x40003da4 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__int32_udivmod.o) *fill* 0x40003da4 0xc 00 .text.libc 0x40003db0 0x30 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__int32_udivmod.o) 0x40003db0 __int32_udiv 0x40003db0 __int32_udivmod 0x40003db0 __udivsi3 .glue_7 0x40003de0 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__int32_udivmod.o) .glue_7t 0x40003de0 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__int32_udivmod.o) .text 0x40003de0 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcpy.o) .text.libc 0x40003de0 0x60 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcpy.o) 0x40003de0 memcpy .glue_7 0x40003e40 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcpy.o) .glue_7t 0x40003e40 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcpy.o) .text 0x40003e40 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memset.o) .text.libc 0x40003e40 0xa0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memset.o) 0x40003e40 memset .glue_7 0x40003ee0 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memset.o) .glue_7t 0x40003ee0 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memset.o) .text 0x40003ee0 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcmp.o) .text.libc 0x40003ee0 0x68 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcmp.o) 0x40003ee0 memcmp .glue_7 0x40003f48 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcmp.o) .glue_7t 0x40003f48 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcmp.o) .text 0x40003f48 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(sprintf.o) .text.libc 0x40003f48 0x44 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(sprintf.o) 0x40003f48 sprintf .glue_7 0x40003f8c 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(sprintf.o) .glue_7t 0x40003f8c 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(sprintf.o) .text 0x40003f8c 0x0 /home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le.a(__vfprintf_long.o) .text.libc 0x40003f8c 0x780 /home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le.a(__vfprintf_long.o) 0x40004048 __vfprintf .glue_7 0x4000470c 0x0 /home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le.a(__vfprintf_long.o) .glue_7t 0x4000470c 0x0 /home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le.a(__vfprintf_long.o) .text 0x4000470c 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(strlen.o) *fill* 0x4000470c 0x4 00 .text.libc 0x40004710 0x60 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(strlen.o) 0x40004710 strlen .glue_7 0x40004770 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(strlen.o) .glue_7t 0x40004770 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(strlen.o) .text 0x40004770 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__hex_lc_uc.o) .text.libc 0x40004770 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__hex_lc_uc.o) .glue_7 0x40004770 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__hex_lc_uc.o) .glue_7t 0x40004770 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__hex_lc_uc.o) 0x40004770 __text_end__ = (__text_start__ + SIZEOF (.text)) 0x00000001 . = ASSERT (((__text_end__ >= __SRAM_segment_start__) && (__text_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .text is too large to fit in SRAM memory segment) 0x40004770 __dtors_load_start__ = (__text_end__ ALIGN 0x4) .dtors 0x40004770 0x0 0x40004770 __dtors_start__ = . *(SORT(.dtors.*)) *(.dtors) 0x40004770 __dtors_end__ = (__dtors_start__ + SIZEOF (.dtors)) 0x00000001 . = ASSERT (((__dtors_end__ >= __SRAM_segment_start__) && (__dtors_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .dtors is too large to fit in SRAM memory segment) 0x40004770 __ctors_load_start__ = (__dtors_end__ ALIGN 0x4) .ctors 0x40004770 0x0 0x40004770 __ctors_start__ = . *(SORT(.ctors.*)) *(.ctors) 0x40004770 __ctors_end__ = (__ctors_start__ + SIZEOF (.ctors)) 0x00000001 . = ASSERT (((__ctors_end__ >= __SRAM_segment_start__) && (__ctors_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .ctors is too large to fit in SRAM memory segment) 0x40004770 __data_load_start__ = (__ctors_end__ ALIGN 0x4) .data 0x40004770 0x0 0x40004770 __data_start__ = . *(.data .data.* .gnu.linkonce.d.*) .data 0x40004770 0x0 ARM RAM Debug/easyweb.o .data 0x40004770 0x0 ARM RAM Debug/EMAC.o .data 0x40004770 0x0 ARM RAM Debug/Retarget.o .data 0x40004770 0x0 ARM RAM Debug/tcpip.o .data 0x40004770 0x0 ARM RAM Debug/catch_irqs.o .data 0x40004770 0x0 ARM RAM Debug/crt0.o .data 0x40004770 0x0 ARM RAM Debug/Philips_LPC230X_Startup.o .data 0x40004770 0x0 ARM RAM Debug/LPC230x.o .data 0x40004770 0x0 ARM RAM Debug/VIC_PL192.o .data 0x40004770 0x0 ARM RAM Debug/VIC_PL192_irq_handler.o .data 0x40004770 0x0 /home/phil/CrossWorks_ARM_1_7/lib/liblpc2000_v4t_a_le.a(liblpc2000_lpc23xx_get_cclk.o) .data 0x40004770 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__int32_udivmod.o) .data 0x40004770 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcpy.o) .data 0x40004770 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memset.o) .data 0x40004770 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcmp.o) .data 0x40004770 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(sprintf.o) .data 0x40004770 0x0 /home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le.a(__vfprintf_long.o) .data 0x40004770 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(strlen.o) .data 0x40004770 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__hex_lc_uc.o) 0x40004770 __data_end__ = (__data_start__ + SIZEOF (.data)) 0x00000001 . = ASSERT (((__data_end__ >= __SRAM_segment_start__) && (__data_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .data is too large to fit in SRAM memory segment) 0x40004770 __rodata_load_start__ = (__data_end__ ALIGN 0x4) .rodata 0x40004770 0x4bc 0x40004770 __rodata_start__ = . *(.rodata .rodata.* .gnu.linkonce.r.*) .rodata 0x40004770 0x494 ARM RAM Debug/easyweb.o 0x40004770 GetResponse 0x400047a2 SubnetMask 0x400047a6 GatewayIP 0x400047ac WebSide 0x4000479e MyIP .rodata 0x40004c04 0x6 ARM RAM Debug/tcpip.o 0x40004c04 MyMAC *fill* 0x40004c0a 0x2 00 .rodata.libc 0x40004c0c 0x20 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__hex_lc_uc.o) 0x40004c0c __hex_uc 0x40004c1c __hex_lc 0x40004c2c __rodata_end__ = (__rodata_start__ + SIZEOF (.rodata)) 0x00000001 . = ASSERT (((__rodata_end__ >= __SRAM_segment_start__) && (__rodata_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .rodata is too large to fit in SRAM memory segment) 0x40004c2c __bss_load_start__ = (__rodata_end__ ALIGN 0x4) .bss 0x40004c2c 0x3da 0x40004c2c __bss_start__ = . *(.bss .bss.* .gnu.linkonce.b.*) .bss 0x40004c2c 0x0 ARM RAM Debug/easyweb.o .bss 0x40004c2c 0x8 ARM RAM Debug/EMAC.o .bss 0x40004c34 0x0 ARM RAM Debug/Retarget.o .bss 0x40004c34 0x0 ARM RAM Debug/tcpip.o .bss 0x40004c34 0x0 ARM RAM Debug/catch_irqs.o .bss 0x40004c34 0x0 ARM RAM Debug/crt0.o .bss 0x40004c34 0x0 ARM RAM Debug/Philips_LPC230X_Startup.o .bss 0x40004c34 0x4 ARM RAM Debug/LPC230x.o .bss 0x40004c38 0x0 ARM RAM Debug/VIC_PL192.o .bss 0x40004c38 0x0 ARM RAM Debug/VIC_PL192_irq_handler.o .bss 0x40004c38 0x0 /home/phil/CrossWorks_ARM_1_7/lib/liblpc2000_v4t_a_le.a(liblpc2000_lpc23xx_get_cclk.o) .bss 0x40004c38 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__int32_udivmod.o) .bss 0x40004c38 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcpy.o) .bss 0x40004c38 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memset.o) .bss 0x40004c38 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcmp.o) .bss 0x40004c38 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(sprintf.o) .bss 0x40004c38 0x0 /home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le.a(__vfprintf_long.o) .bss 0x40004c38 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(strlen.o) .bss 0x40004c38 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__hex_lc_uc.o) *(COMMON) COMMON 0x40004c38 0x3ce ARM RAM Debug/easyweb.o 0x40004c38 TCPTimer 0x40004c3c HTTPBytesToSend 0x40004c40 TCPRxDataCount 0x40004c42 HTTPStatus 0x40004c44 TCPTxDataCount 0x40004c46 RecdFrameIP 0x40004c4a RemoteMAC 0x40004c50 TCPStateMachine 0x40004c54 TCPUNASeqNr 0x40004c58 TCPLocalPort 0x40004c5a _RxTCPBuffer 0x40004d5a TCPFlags 0x40004d5c RecdFrameMAC 0x40004d62 RecdIPFrameLength 0x40004d64 PWebSide 0x40004d68 RemoteIP 0x40004d6c LastFrameSent 0x40004d70 TCPRemotePort 0x40004d72 TxFrame2Size 0x40004d74 TCPAckNr 0x40004d78 TransmitControl 0x40004d7a TxFrame1Size 0x40004d7c ISNGenHigh 0x40004d7e _TxFrame2 0x40004dc8 RecdFrameLength 0x40004dca _TxFrame1 0x40005000 TCPSeqNr 0x40005004 RetryCounter 0x40005005 SocketStatus 0x40005006 __bss_end__ = (__bss_start__ + SIZEOF (.bss)) 0x00000001 . = ASSERT (((__bss_end__ >= __SRAM_segment_start__) && (__bss_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .bss is too large to fit in SRAM memory segment) 0x40005008 __non_init_load_start__ = (__bss_end__ ALIGN 0x4) .non_init 0x40005008 0x0 0x40005008 __non_init_start__ = . *(.non_init .non_init.*) 0x40005008 __non_init_end__ = (__non_init_start__ + SIZEOF (.non_init)) 0x00000001 . = ASSERT (((__non_init_end__ >= __SRAM_segment_start__) && (__non_init_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .non_init is too large to fit in SRAM memory segment) 0x40005008 __heap_load_start__ = (__non_init_end__ ALIGN 0x4) .heap 0x40005008 0x400 0x40005008 __heap_start__ = . *(.heap) 0x40005408 . = (((__heap_start__ + __HEAPSIZE__) MAX_K .) ALIGN 0x4) *fill* 0x40005008 0x400 00 0x40005408 __heap_end__ = (__heap_start__ + SIZEOF (.heap)) 0x00000001 . = ASSERT (((__heap_end__ >= __SRAM_segment_start__) && (__heap_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .heap is too large to fit in SRAM memory segment) 0x40005408 __stack_load_start__ = (__heap_end__ ALIGN 0x4) .stack 0x40005408 0x400 0x40005408 __stack_start__ = . *(.stack) 0x40005808 . = (((__stack_start__ + __STACKSIZE__) MAX_K .) ALIGN 0x4) *fill* 0x40005408 0x400 00 0x40005808 __stack_end__ = (__stack_start__ + SIZEOF (.stack)) 0x00000001 . = ASSERT (((__stack_end__ >= __SRAM_segment_start__) && (__stack_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .stack is too large to fit in SRAM memory segment) 0x40005808 __stack_irq_load_start__ = (__stack_end__ ALIGN 0x4) .stack_irq 0x40005808 0x100 0x40005808 __stack_irq_start__ = . *(.stack_irq) 0x40005908 . = (((__stack_irq_start__ + __STACKSIZE_IRQ__) MAX_K .) ALIGN 0x4) *fill* 0x40005808 0x100 00 0x40005908 __stack_irq_end__ = (__stack_irq_start__ + SIZEOF (.stack_irq)) 0x00000001 . = ASSERT (((__stack_irq_end__ >= __SRAM_segment_start__) && (__stack_irq_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .stack_irq is too large to fit in SRAM memory segment) 0x40005908 __stack_fiq_load_start__ = (__stack_irq_end__ ALIGN 0x4) .stack_fiq 0x40005908 0x100 0x40005908 __stack_fiq_start__ = . *(.stack_fiq) 0x40005a08 . = (((__stack_fiq_start__ + __STACKSIZE_FIQ__) MAX_K .) ALIGN 0x4) *fill* 0x40005908 0x100 00 0x40005a08 __stack_fiq_end__ = (__stack_fiq_start__ + SIZEOF (.stack_fiq)) 0x00000001 . = ASSERT (((__stack_fiq_end__ >= __SRAM_segment_start__) && (__stack_fiq_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .stack_fiq is too large to fit in SRAM memory segment) 0x40005a08 __stack_svc_load_start__ = (__stack_fiq_end__ ALIGN 0x4) .stack_svc 0x40005a08 0x0 0x40005a08 __stack_svc_start__ = . *(.stack_svc) 0x40005a0c . = (((__stack_svc_start__ + __STACKSIZE_SVC__) MAX_K .) ALIGN 0x4) 0x40005a08 __stack_svc_end__ = (__stack_svc_start__ + SIZEOF (.stack_svc)) 0x00000001 . = ASSERT (((__stack_svc_end__ >= __SRAM_segment_start__) && (__stack_svc_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .stack_svc is too large to fit in SRAM memory segment) 0x40005a08 __stack_abt_load_start__ = (__stack_svc_end__ ALIGN 0x4) .stack_abt 0x40005a08 0x0 0x40005a08 __stack_abt_start__ = . *(.stack_abt) 0x40005a0c . = (((__stack_abt_start__ + __STACKSIZE_ABT__) MAX_K .) ALIGN 0x4) 0x40005a08 __stack_abt_end__ = (__stack_abt_start__ + SIZEOF (.stack_abt)) 0x00000001 . = ASSERT (((__stack_abt_end__ >= __SRAM_segment_start__) && (__stack_abt_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .stack_abt is too large to fit in SRAM memory segment) 0x40005a08 __stack_und_load_start__ = (__stack_abt_end__ ALIGN 0x4) .stack_und 0x40005a08 0x0 0x40005a08 __stack_und_start__ = . *(.stack_und) 0x40005a0c . = (((__stack_und_start__ + __STACKSIZE_UND__) MAX_K .) ALIGN 0x4) 0x40005a08 __stack_und_end__ = (__stack_und_start__ + SIZEOF (.stack_und)) 0x40005a08 __SRAM_segment_used_end__ = ((__stack_abt_end__ ALIGN 0x4) + SIZEOF (.stack_und)) 0x00000001 . = ASSERT (((__stack_und_end__ >= __SRAM_segment_start__) && (__stack_und_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .stack_und is too large to fit in SRAM memory segment) START GROUP LOAD ARM RAM Debug/easyweb.o LOAD ARM RAM Debug/EMAC.o LOAD ARM RAM Debug/Retarget.o LOAD ARM RAM Debug/tcpip.o LOAD ARM RAM Debug/catch_irqs.o LOAD ARM RAM Debug/crt0.o LOAD ARM RAM Debug/Philips_LPC230X_Startup.o LOAD ARM RAM Debug/LPC230x.o LOAD ARM RAM Debug/VIC_PL192.o LOAD ARM RAM Debug/VIC_PL192_irq_handler.o LOAD /home/phil/CrossWorks_ARM_1_7/lib/liblpc2000_v4t_a_le.a LOAD /home/phil/CrossWorks_ARM_1_7/lib/libarmdi_v4t_a_le.a LOAD /home/phil/CrossWorks_ARM_1_7/lib/libm_v4t_a_le.a LOAD /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a LOAD /home/phil/CrossWorks_ARM_1_7/lib/libcpp_v4t_a_le.a LOAD /home/phil/CrossWorks_ARM_1_7/lib/libdebugio_v4t_a_le.a LOAD /home/phil/CrossWorks_ARM_1_7/lib/libc_targetio_impl_v4t_a_le.a LOAD /home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le.a LOAD /home/phil/CrossWorks_ARM_1_7/lib/lib_vfscanf_long_v4t_a_le.a END GROUP OUTPUT(ARM RAM Debug/EasyWeb.elf elf32-littlearm) .debug_abbrev 0x00000000 0x585 .debug_abbrev 0x00000000 0xec ARM RAM Debug/easyweb.o .debug_abbrev 0x000000ec 0xf7 ARM RAM Debug/EMAC.o .debug_abbrev 0x000001e3 0x1 ARM RAM Debug/Retarget.o .debug_abbrev 0x000001e4 0x15f ARM RAM Debug/tcpip.o .debug_abbrev 0x00000343 0x28 ARM RAM Debug/catch_irqs.o .debug_abbrev 0x0000036b 0x14 ARM RAM Debug/crt0.o .debug_abbrev 0x0000037f 0x10 ARM RAM Debug/Philips_LPC230X_Startup.o .debug_abbrev 0x0000038f 0xc9 ARM RAM Debug/LPC230x.o .debug_abbrev 0x00000458 0x9e ARM RAM Debug/VIC_PL192.o .debug_abbrev 0x000004f6 0x14 ARM RAM Debug/VIC_PL192_irq_handler.o .debug_abbrev 0x0000050a 0x23 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcmp.o) .debug_abbrev 0x0000052d 0x23 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(sprintf.o) .debug_abbrev 0x00000550 0x34 /home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le.a(__vfprintf_long.o) .debug_abbrev 0x00000584 0x1 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__hex_lc_uc.o) .debug_info 0x00000000 0x200f .debug_info 0x00000000 0x6f2 ARM RAM Debug/easyweb.o .debug_info 0x000006f2 0x4c9 ARM RAM Debug/EMAC.o .debug_info 0x00000bbb 0x0 ARM RAM Debug/Retarget.o .debug_info 0x00000bbb 0xada ARM RAM Debug/tcpip.o .debug_info 0x00001695 0x128 ARM RAM Debug/catch_irqs.o .debug_info 0x000017bd 0xcb ARM RAM Debug/crt0.o .debug_info 0x00001888 0xe7 ARM RAM Debug/Philips_LPC230X_Startup.o .debug_info 0x0000196f 0x228 ARM RAM Debug/LPC230x.o .debug_info 0x00001b97 0x2c2 ARM RAM Debug/VIC_PL192.o .debug_info 0x00001e59 0xe7 ARM RAM Debug/VIC_PL192_irq_handler.o .debug_info 0x00001f40 0x32 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcmp.o) .debug_info 0x00001f72 0x32 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(sprintf.o) .debug_info 0x00001fa4 0x6b /home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le.a(__vfprintf_long.o) .debug_info 0x0000200f 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__hex_lc_uc.o) .debug_line 0x00000000 0xb5d .debug_line 0x00000000 0xde ARM RAM Debug/easyweb.o .debug_line 0x000000de 0x120 ARM RAM Debug/EMAC.o .debug_line 0x000001fe 0x1d ARM RAM Debug/Retarget.o .debug_line 0x0000021b 0x289 ARM RAM Debug/tcpip.o .debug_line 0x000004a4 0x7c ARM RAM Debug/catch_irqs.o .debug_line 0x00000520 0xfb ARM RAM Debug/crt0.o .debug_line 0x0000061b 0x11a ARM RAM Debug/Philips_LPC230X_Startup.o .debug_line 0x00000735 0x10e ARM RAM Debug/LPC230x.o .debug_line 0x00000843 0xf8 ARM RAM Debug/VIC_PL192.o .debug_line 0x0000093b 0xc8 ARM RAM Debug/VIC_PL192_irq_handler.o .debug_line 0x00000a03 0x68 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcmp.o) .debug_line 0x00000a6b 0x69 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(sprintf.o) .debug_line 0x00000ad4 0x6c /home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le.a(__vfprintf_long.o) .debug_line 0x00000b40 0x1d /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__hex_lc_uc.o) .debug_frame 0x00000000 0xc94 .debug_frame 0x00000000 0xc0 ARM RAM Debug/easyweb.o .debug_frame 0x000000c0 0x2d0 ARM RAM Debug/EMAC.o .debug_frame 0x00000390 0x53c ARM RAM Debug/tcpip.o .debug_frame 0x000008cc 0xc0 ARM RAM Debug/catch_irqs.o .debug_frame 0x0000098c 0xec ARM RAM Debug/LPC230x.o .debug_frame 0x00000a78 0x94 ARM RAM Debug/VIC_PL192.o .debug_frame 0x00000b0c 0x20 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__int32_udivmod.o) .debug_frame 0x00000b2c 0x20 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcpy.o) .debug_frame 0x00000b4c 0x20 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memset.o) .debug_frame 0x00000b6c 0x2c /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcmp.o) .debug_frame 0x00000b98 0x40 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(sprintf.o) .debug_frame 0x00000bd8 0x9c /home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le.a(__vfprintf_long.o) .debug_frame 0x00000c74 0x20 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(strlen.o) .debug_loc 0x00000000 0xb0a .debug_loc 0x00000000 0xa8 ARM RAM Debug/easyweb.o .debug_loc 0x000000a8 0x2a0 ARM RAM Debug/EMAC.o .debug_loc 0x00000348 0x4ec ARM RAM Debug/tcpip.o .debug_loc 0x00000834 0xa8 ARM RAM Debug/catch_irqs.o .debug_loc 0x000008dc 0xd2 ARM RAM Debug/LPC230x.o .debug_loc 0x000009ae 0x7e ARM RAM Debug/VIC_PL192.o .debug_loc 0x00000a2c 0x1f /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcmp.o) .debug_loc 0x00000a4b 0x37 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(sprintf.o) .debug_loc 0x00000a82 0x88 /home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le.a(__vfprintf_long.o) .debug_pubnames 0x00000000 0x768 .debug_pubnames 0x00000000 0x26f ARM RAM Debug/easyweb.o .debug_pubnames 0x0000026f 0x135 ARM RAM Debug/EMAC.o .debug_pubnames 0x000003a4 0x27a ARM RAM Debug/tcpip.o .debug_pubnames 0x0000061e 0x54 ARM RAM Debug/catch_irqs.o .debug_pubnames 0x00000672 0x54 ARM RAM Debug/LPC230x.o .debug_pubnames 0x000006c6 0x46 ARM RAM Debug/VIC_PL192.o .debug_pubnames 0x0000070c 0x1d /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcmp.o) .debug_pubnames 0x00000729 0x1e /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(sprintf.o) .debug_pubnames 0x00000747 0x21 /home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le.a(__vfprintf_long.o) .debug_aranges 0x00000000 0x188 .debug_aranges 0x00000000 0x20 ARM RAM Debug/easyweb.o .debug_aranges 0x00000020 0x20 ARM RAM Debug/EMAC.o .debug_aranges 0x00000040 0x20 ARM RAM Debug/tcpip.o .debug_aranges 0x00000060 0x20 ARM RAM Debug/catch_irqs.o .debug_aranges 0x00000080 0x20 ARM RAM Debug/crt0.o .debug_aranges 0x000000a0 0x28 ARM RAM Debug/Philips_LPC230X_Startup.o .debug_aranges 0x000000c8 0x20 ARM RAM Debug/LPC230x.o .debug_aranges 0x000000e8 0x20 ARM RAM Debug/VIC_PL192.o .debug_aranges 0x00000108 0x20 ARM RAM Debug/VIC_PL192_irq_handler.o .debug_aranges 0x00000128 0x20 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcmp.o) .debug_aranges 0x00000148 0x20 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(sprintf.o) .debug_aranges 0x00000168 0x20 /home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le.a(__vfprintf_long.o) .debug_str 0x00000000 0x155 .debug_str 0x00000000 0x12 ARM RAM Debug/easyweb.o .debug_str 0x00000012 0x1b ARM RAM Debug/tcpip.o .debug_str 0x0000002d 0x7 ARM RAM Debug/VIC_PL192.o .debug_str 0x00000034 0x5b /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcmp.o) .debug_str 0x0000008f 0x51 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(sprintf.o) 0x5d (size before relaxing) .debug_str 0x000000e0 0x75 /home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le.a(__vfprintf_long.o) 0x81 (size before relaxing) .comment 0x00000000 0xd8 .comment 0x00000000 0x12 ARM RAM Debug/easyweb.o .comment 0x00000012 0x12 ARM RAM Debug/EMAC.o .comment 0x00000024 0x12 ARM RAM Debug/Retarget.o .comment 0x00000036 0x12 ARM RAM Debug/tcpip.o .comment 0x00000048 0x12 ARM RAM Debug/catch_irqs.o .comment 0x0000005a 0x12 ARM RAM Debug/LPC230x.o .comment 0x0000006c 0x12 ARM RAM Debug/VIC_PL192.o .comment 0x0000007e 0x12 /home/phil/CrossWorks_ARM_1_7/lib/liblpc2000_v4t_a_le.a(liblpc2000_lpc23xx_get_cclk.o) .comment 0x00000090 0x12 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcmp.o) .comment 0x000000a2 0x12 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(sprintf.o) .comment 0x000000b4 0x12 /home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le.a(__vfprintf_long.o) .comment 0x000000c6 0x12 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__hex_lc_uc.o)