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/*---------------------------------------------------------------------------- |
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* U S B - K e r n e l |
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*---------------------------------------------------------------------------- |
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* Name: USBREG.H |
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* Purpose: USB Hardware Layer Definitions for Philips LPC214x/LPC318x/23xx/24xx |
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* Version: V1.10 |
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*---------------------------------------------------------------------------- |
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* This file is part of the uVision/ARM development tools. |
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* This software may only be used under the terms of a valid, current, |
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* end user licence from KEIL for a compatible version of KEIL software |
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* development tools. Nothing else gives you the right to use it. |
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* |
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* Copyright (c) 2005-2006 Keil Software. |
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*---------------------------------------------------------------------------*/ |
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#ifndef __USBREG_H |
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#define __USBREG_H |
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/* Device Interrupt Bit Definitions */ |
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#define FRAME_INT 0x00000001 |
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#define EP_FAST_INT 0x00000002 |
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#define EP_SLOW_INT 0x00000004 |
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#define DEV_STAT_INT 0x00000008 |
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#define CCEMTY_INT 0x00000010 |
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#define CDFULL_INT 0x00000020 |
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#define RxENDPKT_INT 0x00000040 |
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#define TxENDPKT_INT 0x00000080 |
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#define EP_RLZED_INT 0x00000100 |
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#define ERR_INT 0x00000200 |
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/* Rx & Tx Packet Length Definitions */ |
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#define PKT_LNGTH_MASK 0x000003FF |
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#define PKT_DV 0x00000400 |
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#define PKT_RDY 0x00000800 |
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/* USB Control Definitions */ |
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#define CTRL_RD_EN 0x00000001 |
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#define CTRL_WR_EN 0x00000002 |
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/* Command Codes */ |
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#define CMD_SET_ADDR 0x00D00500 |
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#define CMD_CFG_DEV 0x00D80500 |
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#define CMD_SET_MODE 0x00F30500 |
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#define CMD_RD_FRAME 0x00F50500 |
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#define DAT_RD_FRAME 0x00F50200 |
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#define CMD_RD_TEST 0x00FD0500 |
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#define DAT_RD_TEST 0x00FD0200 |
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#define CMD_SET_DEV_STAT 0x00FE0500 |
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#define CMD_GET_DEV_STAT 0x00FE0500 |
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#define DAT_GET_DEV_STAT 0x00FE0200 |
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#define CMD_GET_ERR_CODE 0x00FF0500 |
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#define DAT_GET_ERR_CODE 0x00FF0200 |
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#define CMD_RD_ERR_STAT 0x00FB0500 |
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#define DAT_RD_ERR_STAT 0x00FB0200 |
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#define DAT_WR_BYTE(x) (0x00000100 | ((x) << 16)) |
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#define CMD_SEL_EP(x) (0x00000500 | ((x) << 16)) |
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#define DAT_SEL_EP(x) (0x00000200 | ((x) << 16)) |
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#define CMD_SEL_EP_CLRI(x) (0x00400500 | ((x) << 16)) |
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#define DAT_SEL_EP_CLRI(x) (0x00400200 | ((x) << 16)) |
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#define CMD_SET_EP_STAT(x) (0x00400500 | ((x) << 16)) |
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#define CMD_CLR_BUF 0x00F20500 |
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#define DAT_CLR_BUF 0x00F20200 |
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#define CMD_VALID_BUF 0x00FA0500 |
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/* Device Address Register Definitions */ |
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#define DEV_ADDR_MASK 0x7F |
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#define DEV_EN 0x80 |
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/* Device Configure Register Definitions */ |
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#define CONF_DVICE 0x01 |
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/* Device Mode Register Definitions */ |
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#define AP_CLK 0x01 |
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#define INAK_CI 0x02 |
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#define INAK_CO 0x04 |
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#define INAK_II 0x08 |
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#define INAK_IO 0x10 |
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#define INAK_BI 0x20 |
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#define INAK_BO 0x40 |
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/* Device Status Register Definitions */ |
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#define DEV_CON 0x01 |
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#define DEV_CON_CH 0x02 |
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#define DEV_SUS 0x04 |
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#define DEV_SUS_CH 0x08 |
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#define DEV_RST 0x10 |
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/* Error Code Register Definitions */ |
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#define ERR_EC_MASK 0x0F |
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#define ERR_EA 0x10 |
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/* Error Status Register Definitions */ |
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#define ERR_PID 0x01 |
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#define ERR_UEPKT 0x02 |
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#define ERR_DCRC 0x04 |
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#define ERR_TIMOUT 0x08 |
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#define ERR_EOP 0x10 |
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#define ERR_B_OVRN 0x20 |
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#define ERR_BTSTF 0x40 |
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#define ERR_TGL 0x80 |
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/* Endpoint Select Register Definitions */ |
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#define EP_SEL_F 0x01 |
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#define EP_SEL_ST 0x02 |
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#define EP_SEL_STP 0x04 |
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#define EP_SEL_PO 0x08 |
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#define EP_SEL_EPN 0x10 |
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#define EP_SEL_B_1_FULL 0x20 |
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#define EP_SEL_B_2_FULL 0x40 |
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/* Endpoint Status Register Definitions */ |
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#define EP_STAT_ST 0x01 |
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#define EP_STAT_DA 0x20 |
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#define EP_STAT_RF_MO 0x40 |
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#define EP_STAT_CND_ST 0x80 |
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/* Clear Buffer Register Definitions */ |
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#define CLR_BUF_PO 0x01 |
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/* DMA Interrupt Bit Definitions */ |
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#define EOT_INT 0x01 |
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#define NDD_REQ_INT 0x02 |
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#define SYS_ERR_INT 0x04 |
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#endif /* __USBREG_H */ |
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