CrossWorks_TaskingLib_Test.map

Revision 13, 29.0 kB (checked in by phil, 15 years ago)
Crossworks Lib Example (multiple tasks)

Line
1	Archive member included because of file (symbol)
2
3	/home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl.o)
4	ARM Flash Release/main.o (ctl_task_init)
5	/home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl_arm.o)
6	/home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl.o) (ctl_private_init_registers)
7	/home/phil/CrossWorks_ARM_1_7/lib/liblpc2000_v4t_a_le_mt.a(liblpc2000_lpc23xx_get_cclk.o)
8	ARM Flash Release/LPC230x.o (liblpc2000_lpc23xx_get_cclk)
9	/home/phil/CrossWorks_ARM_1_7/lib/libarmdi_v4t_a_le_mt.a(libarm_set_irq.o)
10	/home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl.o) (ctl_global_interrupts_set)
11	/home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le_mt.a(__int32_udivmod.o)
12	/home/phil/CrossWorks_ARM_1_7/lib/liblpc2000_v4t_a_le_mt.a(liblpc2000_lpc23xx_get_cclk.o) (__udivsi3)
13	/home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le_mt.a(memset.o)
14	ARM Flash Release/main.o (memset)
15
16	Allocating common symbols
17	Common symbol size file
18
19	ctl_interrupt_count
20	0x1 /home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl.o)
21	new_task_stack 0x108 ARM Flash Release/main_ctl.o
22	ctl_current_time 0x4 /home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl.o)
23	ctl_timeslice_period
24	0x4 /home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl.o)
25	ctl_task_executing 0x4 /home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl.o)
26	new_task 0x20 ARM Flash Release/main_ctl.o
27	main_task 0x20 ARM Flash Release/main_ctl.o
28	ctl_task_list 0x4 /home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl.o)
29
30	Memory Configuration
31
32	Name Origin Length Attributes
33	UNPLACED_SECTIONS 0xffffffff 0x00000000 xw
34	AHB_Peripherals 0xffe00000 0x00200000 xw
35	Battery_RAM 0xe0084000 0x00000800 xw
36	APB_Peripherals 0xe0000000 0x00200000 xw
37	USB_RAM 0x7fd00000 0x00002000 xw
38	Ethernet_RAM 0x7fe00000 0x00004000 xw
39	SRAM 0x40000000 0x00008000 xw
40	FLASH 0x00000000 0x00080000 xr
41	default 0x00000000 0xffffffff
42
43	Linker script and memory map
44
45	0xffe00000 __AHB_Peripherals_segment_start__ = 0xffe00000
46	0x00000000 __AHB_Peripherals_segment_end__ = 0x0
47	0xe0084000 __Battery_RAM_segment_start__ = 0xe0084000
48	0xe0084800 __Battery_RAM_segment_end__ = 0xe0084800
49	0xe0000000 __APB_Peripherals_segment_start__ = 0xe0000000
50	0xe0200000 __APB_Peripherals_segment_end__ = 0xe0200000
51	0x7fd00000 __USB_RAM_segment_start__ = 0x7fd00000
52	0x7fd02000 __USB_RAM_segment_end__ = 0x7fd02000
53	0x7fe00000 __Ethernet_RAM_segment_start__ = 0x7fe00000
54	0x7fe04000 __Ethernet_RAM_segment_end__ = 0x7fe04000
55	0x40000000 __SRAM_segment_start__ = 0x40000000
56	0x40008000 __SRAM_segment_end__ = 0x40008000
57	0x00000000 __FLASH_segment_start__ = 0x0
58	0x00080000 __FLASH_segment_end__ = 0x80000
59	0x00000400 __STACKSIZE__ = 0x400
60	0x00000100 __STACKSIZE_IRQ__ = 0x100
61	0x00000100 __STACKSIZE_FIQ__ = 0x100
62	0x00000000 __STACKSIZE_SVC__ = 0x0
63	0x00000000 __STACKSIZE_ABT__ = 0x0
64	0x00000000 __STACKSIZE_UND__ = 0x0
65	0x00000400 __HEAPSIZE__ = 0x400
66	0x40000000 __vectors_ram_load_start__ = __SRAM_segment_start__
67
68	.vectors_ram 0x40000000 0x3c
69	0x40000000 __vectors_ram_start__ = .
70	*(.vectors_ram)
71	0x4000003c . = ((__vectors_ram_start__ + 0x3c) MAX_K .)
72	fill 0x40000000 0x3c 00
73	0x4000003c __vectors_ram_end__ = (__vectors_ram_start__ + SIZEOF (.vectors_ram))
74	0x00000001 . = ASSERT (((__vectors_ram_end__ >= __SRAM_segment_start__) && (__vectors_ram_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .vectors_ram is too large to fit in SRAM memory segment)
75	0x00000000 __vectors_load_start__ = __FLASH_segment_start__
76
77	.vectors 0x00000000 0x3c
78	0x00000000 __vectors_start__ = .
79	(.vectors .vectors.)
80	.vectors 0x00000000 0x3c ARM Flash Release/Philips_LPC230X_Startup.o
81	0x00000000 _vectors
82	0x0000003c __vectors_end__ = (__vectors_start__ + SIZEOF (.vectors))
83	0x00000001 . = ASSERT (((__vectors_end__ >= __FLASH_segment_start__) && (__vectors_end__ <= (__FLASH_segment_start__ + 0x80000))), error: .vectors is too large to fit in FLASH memory segment)
84	0x0000003c __init_load_start__ = (__vectors_end__ ALIGN 0x4)
85
86	.init 0x0000003c 0x2dc
87	0x0000003c __init_start__ = .
88	(.init .init.)
89	fill 0x0000003c 0x4 00
90	.init 0x00000040 0x1d0 ARM Flash Release/crt0.o
91	0x00000040 __start
92	0x00000040 _start
93	.init 0x00000210 0x108 ARM Flash Release/Philips_LPC230X_Startup.o
94	0x00000210 reset_handler
95	0x000002fc undef_handler
96	0x00000304 pabort_handler
97	0x00000308 dabort_handler
98	0x00000300 swi_handler
99	0x0000030c fiq_handler
100	0x00000318 __init_end__ = (__init_start__ + SIZEOF (.init))
101	0x00000001 . = ASSERT (((__init_end__ >= __FLASH_segment_start__) && (__init_end__ <= (__FLASH_segment_start__ + 0x80000))), error: .init is too large to fit in FLASH memory segment)
102	0x00000318 __text_load_start__ = (__init_end__ ALIGN 0x4)
103
104	.text 0x00000318 0xe08
105	0x00000318 __text_start__ = .
106	(.text .text. .glue_7t .glue_7 .gnu.linkonce.t.* .gcc_except_table)
107	.text 0x00000318 0x8 ARM Flash Release/main_ctl.o
108	0x0000031c ctl_handle_error
109	0x00000318 new_task_code
110	.glue_7 0x00000320 0x0 ARM Flash Release/main_ctl.o
111	.glue_7t 0x00000320 0x0 ARM Flash Release/main_ctl.o
112	.text 0x00000320 0x248 ARM Flash Release/main.o
113	0x00000320 ConfigBlinky
114	0x000004d8 task1
115	0x00000448 task2
116	0x00000378 main
117	0x00000374 delay
118	.glue_7 0x00000568 0x0 ARM Flash Release/main.o
119	.glue_7t 0x00000568 0x0 ARM Flash Release/main.o
120	.text 0x00000568 0x0 ARM Flash Release/crt0.o
121	.glue_7 0x00000568 0x0 ARM Flash Release/crt0.o
122	.glue_7t 0x00000568 0x0 ARM Flash Release/crt0.o
123	.text 0x00000568 0x0 ARM Flash Release/Philips_LPC230X_Startup.o
124	.glue_7 0x00000568 0x0 ARM Flash Release/Philips_LPC230X_Startup.o
125	.glue_7t 0x00000568 0x0 ARM Flash Release/Philips_LPC230X_Startup.o
126	.text 0x00000568 0x1a4 ARM Flash Release/LPC230x.o
127	0x000005bc ctl_get_ticks_per_second
128	0x0000066c ctl_start_timer
129	0x000005c4 get_uart_clk
130	.glue_7 0x0000070c 0x0 ARM Flash Release/LPC230x.o
131	.glue_7t 0x0000070c 0x0 ARM Flash Release/LPC230x.o
132	.text 0x0000070c 0xa0 ARM Flash Release/VIC_PL192.o
133	0x0000077c ctl_unmask_isr
134	0x0000070c ctl_set_isr
135	0x00000794 ctl_mask_isr
136	.glue_7 0x000007ac 0x0 ARM Flash Release/VIC_PL192.o
137	.glue_7t 0x000007ac 0x0 ARM Flash Release/VIC_PL192.o
138	.text 0x000007ac 0x68 ARM Flash Release/VIC_PL192_irq_handler.o
139	0x000007ac irq_handler
140	.glue_7 0x00000814 0x0 ARM Flash Release/VIC_PL192_irq_handler.o
141	.glue_7t 0x00000814 0x0 ARM Flash Release/VIC_PL192_irq_handler.o
142	.text 0x00000814 0x0 /home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl.o)
143	.text.libctl 0x00000814 0x604 /home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl.o)
144	0x00000ca0 ctl_task_remove
145	0x00000b64 ctl_private_reschedule
146	0x00000d60 ctl_task_reschedule
147	0x00000c60 ctl_task_set_priority
148	0x00000888 ctl_task_init
149	0x00000944 ctl_exit_isr
150	0x00000bfc ctl_timeout_wait
151	0x00000b18 ctl_task_die
152	0x0000091c ctl_get_current_time
153	0x00000d90 ctl_task_run
154	0x000008ac ctl_increment_tick_from_isr
155	.glue_7 0x00000e18 0x0 /home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl.o)
156	.glue_7t 0x00000e18 0x0 /home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl.o)
157	.text 0x00000e18 0x0 /home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl_arm.o)
158	.text.libctl 0x00000e18 0x170 /home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl_arm.o)
159	0x00000e80 ctl_private_switch_context
160	0x00000f6c ctl_private_isr_return
161	0x00000ef0 ctl_private_switch_isr_context
162	0x00000e18 ctl_private_init_registers
163	.glue_7 0x00000f88 0x0 /home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl_arm.o)
164	.glue_7t 0x00000f88 0x0 /home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl_arm.o)
165	.text 0x00000f88 0x0 /home/phil/CrossWorks_ARM_1_7/lib/liblpc2000_v4t_a_le_mt.a(liblpc2000_lpc23xx_get_cclk.o)
166	.text.liblpc2000
167	0x00000f88 0x98 /home/phil/CrossWorks_ARM_1_7/lib/liblpc2000_v4t_a_le_mt.a(liblpc2000_lpc23xx_get_cclk.o)
168	0x00000f88 liblpc2000_lpc23xx_get_cclk
169	.glue_7 0x00001020 0x0 /home/phil/CrossWorks_ARM_1_7/lib/liblpc2000_v4t_a_le_mt.a(liblpc2000_lpc23xx_get_cclk.o)
170	.glue_7t 0x00001020 0x0 /home/phil/CrossWorks_ARM_1_7/lib/liblpc2000_v4t_a_le_mt.a(liblpc2000_lpc23xx_get_cclk.o)
171	.text 0x00001020 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libarmdi_v4t_a_le_mt.a(libarm_set_irq.o)
172	.text.libc 0x00001020 0x30 /home/phil/CrossWorks_ARM_1_7/lib/libarmdi_v4t_a_le_mt.a(libarm_set_irq.o)
173	0x00001020 ctl_global_interrupts_set
174	0x00001020 libarm_set_irq
175	.glue_7 0x00001050 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libarmdi_v4t_a_le_mt.a(libarm_set_irq.o)
176	.glue_7t 0x00001050 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libarmdi_v4t_a_le_mt.a(libarm_set_irq.o)
177	.text 0x00001050 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le_mt.a(__int32_udivmod.o)
178	.text.libc 0x00001050 0x30 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le_mt.a(__int32_udivmod.o)
179	0x00001050 __int32_udiv
180	0x00001050 __int32_udivmod
181	0x00001050 __udivsi3
182	.glue_7 0x00001080 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le_mt.a(__int32_udivmod.o)
183	.glue_7t 0x00001080 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le_mt.a(__int32_udivmod.o)
184	.text 0x00001080 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le_mt.a(memset.o)
185	.text.libc 0x00001080 0xa0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le_mt.a(memset.o)
186	0x00001080 memset
187	.glue_7 0x00001120 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le_mt.a(memset.o)
188	.glue_7t 0x00001120 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le_mt.a(memset.o)
189	0x00001120 __text_end__ = (__text_start__ + SIZEOF (.text))
190	0x00000001 . = ASSERT (((__text_end__ >= __FLASH_segment_start__) && (__text_end__ <= (__FLASH_segment_start__ + 0x80000))), error: .text is too large to fit in FLASH memory segment)
191	0x00001120 __dtors_load_start__ = (__text_end__ ALIGN 0x4)
192
193	.dtors 0x00001120 0x0
194	0x00001120 __dtors_start__ = .
195	(SORT(.dtors.))
196	*(.dtors)
197	0x00001120 __dtors_end__ = (__dtors_start__ + SIZEOF (.dtors))
198	0x00000001 . = ASSERT (((__dtors_end__ >= __FLASH_segment_start__) && (__dtors_end__ <= (__FLASH_segment_start__ + 0x80000))), error: .dtors is too large to fit in FLASH memory segment)
199	0x00001120 __ctors_load_start__ = (__dtors_end__ ALIGN 0x4)
200
201	.ctors 0x00001120 0x0
202	0x00001120 __ctors_start__ = .
203	(SORT(.ctors.))
204	*(.ctors)
205	0x00001120 __ctors_end__ = (__ctors_start__ + SIZEOF (.ctors))
206	0x00000001 . = ASSERT (((__ctors_end__ >= __FLASH_segment_start__) && (__ctors_end__ <= (__FLASH_segment_start__ + 0x80000))), error: .ctors is too large to fit in FLASH memory segment)
207	0x00001120 __rodata_load_start__ = (__ctors_end__ ALIGN 0x4)
208
209	.rodata 0x00001120 0x18
210	0x00001120 __rodata_start__ = .
211	(.rodata .rodata. .gnu.linkonce.r.*)
212	.rodata.str1.4
213	0x00001120 0x18 ARM Flash Release/main.o
214	0x00001138 __rodata_end__ = (__rodata_start__ + SIZEOF (.rodata))
215	0x00000001 . = ASSERT (((__rodata_end__ >= __FLASH_segment_start__) && (__rodata_end__ <= (__FLASH_segment_start__ + 0x80000))), error: .rodata is too large to fit in FLASH memory segment)
216	0x00001138 __fast_load_start__ = (__rodata_end__ ALIGN 0x4)
217
218	.fast 0x4000003c 0x0 load address 0x00001138
219	0x4000003c __fast_start__ = .
220	(.fast .fast.)
221	0x4000003c __fast_end__ = (__fast_start__ + SIZEOF (.fast))
222	0x00001138 __fast_load_end__ = (__fast_load_start__ + SIZEOF (.fast))
223	0x00000001 . = ASSERT ((((__fast_load_start__ + SIZEOF (.fast)) >= __FLASH_segment_start__) && ((__fast_load_start__ + SIZEOF (.fast)) <= (__FLASH_segment_start__ + 0x80000))), error: .fast is too large to fit in FLASH memory segment)
224
225	.fast_run 0x4000003c 0x0
226	0x4000003c __fast_run_start__ = .
227	0x4000003c . = ((__fast_run_start__ + SIZEOF (.fast)) MAX_K .)
228	0x4000003c __fast_run_end__ = (__fast_run_start__ + SIZEOF (.fast_run))
229	0x00000001 . = ASSERT (((__fast_run_end__ >= __SRAM_segment_start__) && (__fast_run_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .fast_run is too large to fit in SRAM memory segment)
230	0x00001138 __data_load_start__ = ((__fast_load_start__ + SIZEOF (.fast)) ALIGN 0x4)
231
232	.data 0x4000003c 0x0 load address 0x00001138
233	0x4000003c __data_start__ = .
234	(.data .data. .gnu.linkonce.d.*)
235	.data 0x4000003c 0x0 ARM Flash Release/main_ctl.o
236	.data 0x4000003c 0x0 ARM Flash Release/main.o
237	.data 0x4000003c 0x0 ARM Flash Release/crt0.o
238	.data 0x4000003c 0x0 ARM Flash Release/Philips_LPC230X_Startup.o
239	.data 0x4000003c 0x0 ARM Flash Release/LPC230x.o
240	.data 0x4000003c 0x0 ARM Flash Release/VIC_PL192.o
241	.data 0x4000003c 0x0 ARM Flash Release/VIC_PL192_irq_handler.o
242	.data 0x4000003c 0x0 /home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl.o)
243	.data 0x4000003c 0x0 /home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl_arm.o)
244	.data 0x4000003c 0x0 /home/phil/CrossWorks_ARM_1_7/lib/liblpc2000_v4t_a_le_mt.a(liblpc2000_lpc23xx_get_cclk.o)
245	.data 0x4000003c 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libarmdi_v4t_a_le_mt.a(libarm_set_irq.o)
246	.data 0x4000003c 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le_mt.a(__int32_udivmod.o)
247	.data 0x4000003c 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le_mt.a(memset.o)
248	0x4000003c __data_end__ = (__data_start__ + SIZEOF (.data))
249	0x00001138 __data_load_end__ = (__data_load_start__ + SIZEOF (.data))
250	0x00001138 __FLASH_segment_used_end__ = (((__fast_load_start__ + SIZEOF (.fast)) ALIGN 0x4) + SIZEOF (.data))
251	0x00000001 . = ASSERT ((((__data_load_start__ + SIZEOF (.data)) >= __FLASH_segment_start__) && ((__data_load_start__ + SIZEOF (.data)) <= (__FLASH_segment_start__ + 0x80000))), error: .data is too large to fit in FLASH memory segment)
252
253	.data_run 0x4000003c 0x0
254	0x4000003c __data_run_start__ = .
255	0x4000003c . = ((__data_run_start__ + SIZEOF (.data)) MAX_K .)
256	0x4000003c __data_run_end__ = (__data_run_start__ + SIZEOF (.data_run))
257	0x00000001 . = ASSERT (((__data_run_end__ >= __SRAM_segment_start__) && (__data_run_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .data_run is too large to fit in SRAM memory segment)
258	0x4000003c __bss_load_start__ = (__data_run_end__ ALIGN 0x4)
259
260	.bss 0x4000003c 0x3c8
261	0x4000003c __bss_start__ = .
262	(.bss .bss. .gnu.linkonce.b.*)
263	.bss 0x4000003c 0x0 ARM Flash Release/main_ctl.o
264	.bss 0x4000003c 0x268 ARM Flash Release/main.o
265	0x40000040 led_2_state
266	0x4000003c led_1_state
267	.bss 0x400002a4 0x0 ARM Flash Release/crt0.o
268	.bss 0x400002a4 0x0 ARM Flash Release/Philips_LPC230X_Startup.o
269	.bss 0x400002a4 0x4 ARM Flash Release/LPC230x.o
270	.bss 0x400002a8 0x0 ARM Flash Release/VIC_PL192.o
271	.bss 0x400002a8 0x0 ARM Flash Release/VIC_PL192_irq_handler.o
272	.bss 0x400002a8 0x0 /home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl.o)
273	.bss 0x400002a8 0x0 /home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl_arm.o)
274	.bss 0x400002a8 0x0 /home/phil/CrossWorks_ARM_1_7/lib/liblpc2000_v4t_a_le_mt.a(liblpc2000_lpc23xx_get_cclk.o)
275	.bss 0x400002a8 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libarmdi_v4t_a_le_mt.a(libarm_set_irq.o)
276	.bss 0x400002a8 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le_mt.a(__int32_udivmod.o)
277	.bss 0x400002a8 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le_mt.a(memset.o)
278	*(COMMON)
279	COMMON 0x400002a8 0x148 ARM Flash Release/main_ctl.o
280	0x400002a8 new_task_stack
281	0x400003b0 new_task
282	0x400003d0 main_task
283	COMMON 0x400003f0 0x14 /home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl.o)
284	0x400003f0 ctl_interrupt_count
285	0x400003f4 ctl_current_time
286	0x400003f8 ctl_timeslice_period
287	0x400003fc ctl_task_executing
288	0x40000400 ctl_task_list
289	0x40000404 __bss_end__ = (__bss_start__ + SIZEOF (.bss))
290	0x00000001 . = ASSERT (((__bss_end__ >= __SRAM_segment_start__) && (__bss_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .bss is too large to fit in SRAM memory segment)
291	0x40000404 __non_init_load_start__ = (__bss_end__ ALIGN 0x4)
292
293	.non_init 0x40000404 0x0
294	0x40000404 __non_init_start__ = .
295	(.non_init .non_init.)
296	0x40000404 __non_init_end__ = (__non_init_start__ + SIZEOF (.non_init))
297	0x00000001 . = ASSERT (((__non_init_end__ >= __SRAM_segment_start__) && (__non_init_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .non_init is too large to fit in SRAM memory segment)
298	0x40000404 __heap_load_start__ = (__non_init_end__ ALIGN 0x4)
299
300	.heap 0x40000404 0x400
301	0x40000404 __heap_start__ = .
302	*(.heap)
303	0x40000804 . = (((__heap_start__ + __HEAPSIZE__) MAX_K .) ALIGN 0x4)
304	fill 0x40000404 0x400 00
305	0x40000804 __heap_end__ = (__heap_start__ + SIZEOF (.heap))
306	0x00000001 . = ASSERT (((__heap_end__ >= __SRAM_segment_start__) && (__heap_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .heap is too large to fit in SRAM memory segment)
307	0x40000804 __stack_load_start__ = (__heap_end__ ALIGN 0x4)
308
309	.stack 0x40000804 0x400
310	0x40000804 __stack_start__ = .
311	*(.stack)
312	0x40000c04 . = (((__stack_start__ + __STACKSIZE__) MAX_K .) ALIGN 0x4)
313	fill 0x40000804 0x400 00
314	0x40000c04 __stack_end__ = (__stack_start__ + SIZEOF (.stack))
315	0x00000001 . = ASSERT (((__stack_end__ >= __SRAM_segment_start__) && (__stack_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .stack is too large to fit in SRAM memory segment)
316	0x40000c04 __stack_irq_load_start__ = (__stack_end__ ALIGN 0x4)
317
318	.stack_irq 0x40000c04 0x100
319	0x40000c04 __stack_irq_start__ = .
320	*(.stack_irq)
321	0x40000d04 . = (((__stack_irq_start__ + __STACKSIZE_IRQ__) MAX_K .) ALIGN 0x4)
322	fill 0x40000c04 0x100 00
323	0x40000d04 __stack_irq_end__ = (__stack_irq_start__ + SIZEOF (.stack_irq))
324	0x00000001 . = ASSERT (((__stack_irq_end__ >= __SRAM_segment_start__) && (__stack_irq_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .stack_irq is too large to fit in SRAM memory segment)
325	0x40000d04 __stack_fiq_load_start__ = (__stack_irq_end__ ALIGN 0x4)
326
327	.stack_fiq 0x40000d04 0x100
328	0x40000d04 __stack_fiq_start__ = .
329	*(.stack_fiq)
330	0x40000e04 . = (((__stack_fiq_start__ + __STACKSIZE_FIQ__) MAX_K .) ALIGN 0x4)
331	fill 0x40000d04 0x100 00
332	0x40000e04 __stack_fiq_end__ = (__stack_fiq_start__ + SIZEOF (.stack_fiq))
333	0x00000001 . = ASSERT (((__stack_fiq_end__ >= __SRAM_segment_start__) && (__stack_fiq_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .stack_fiq is too large to fit in SRAM memory segment)
334	0x40000e04 __stack_svc_load_start__ = (__stack_fiq_end__ ALIGN 0x4)
335
336	.stack_svc 0x40000e04 0x0
337	0x40000e04 __stack_svc_start__ = .
338	*(.stack_svc)
339	0x40000e08 . = (((__stack_svc_start__ + __STACKSIZE_SVC__) MAX_K .) ALIGN 0x4)
340	0x40000e04 __stack_svc_end__ = (__stack_svc_start__ + SIZEOF (.stack_svc))
341	0x00000001 . = ASSERT (((__stack_svc_end__ >= __SRAM_segment_start__) && (__stack_svc_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .stack_svc is too large to fit in SRAM memory segment)
342	0x40000e04 __stack_abt_load_start__ = (__stack_svc_end__ ALIGN 0x4)
343
344	.stack_abt 0x40000e04 0x0
345	0x40000e04 __stack_abt_start__ = .
346	*(.stack_abt)
347	0x40000e08 . = (((__stack_abt_start__ + __STACKSIZE_ABT__) MAX_K .) ALIGN 0x4)
348	0x40000e04 __stack_abt_end__ = (__stack_abt_start__ + SIZEOF (.stack_abt))
349	0x00000001 . = ASSERT (((__stack_abt_end__ >= __SRAM_segment_start__) && (__stack_abt_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .stack_abt is too large to fit in SRAM memory segment)
350	0x40000e04 __stack_und_load_start__ = (__stack_abt_end__ ALIGN 0x4)
351
352	.stack_und 0x40000e04 0x0
353	0x40000e04 __stack_und_start__ = .
354	*(.stack_und)
355	0x40000e08 . = (((__stack_und_start__ + __STACKSIZE_UND__) MAX_K .) ALIGN 0x4)
356	0x40000e04 __stack_und_end__ = (__stack_und_start__ + SIZEOF (.stack_und))
357	0x40000e04 __SRAM_segment_used_end__ = ((__stack_abt_end__ ALIGN 0x4) + SIZEOF (.stack_und))
358	0x00000001 . = ASSERT (((__stack_und_end__ >= __SRAM_segment_start__) && (__stack_und_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .stack_und is too large to fit in SRAM memory segment)
359	START GROUP
360	LOAD ARM Flash Release/main_ctl.o
361	LOAD ARM Flash Release/main.o
362	LOAD ARM Flash Release/crt0.o
363	LOAD ARM Flash Release/Philips_LPC230X_Startup.o
364	LOAD ARM Flash Release/LPC230x.o
365	LOAD ARM Flash Release/VIC_PL192.o
366	LOAD ARM Flash Release/VIC_PL192_irq_handler.o
367	LOAD /home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a
368	LOAD /home/phil/CrossWorks_ARM_1_7/lib/liblpc2000_v4t_a_le_mt.a
369	LOAD /home/phil/CrossWorks_ARM_1_7/lib/libarmdi_v4t_a_le_mt.a
370	LOAD /home/phil/CrossWorks_ARM_1_7/lib/libm_v4t_a_le_mt.a
371	LOAD /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le_mt.a
372	LOAD /home/phil/CrossWorks_ARM_1_7/lib/libcpp_v4t_a_le_mt.a
373	LOAD /home/phil/CrossWorks_ARM_1_7/lib/libdebugio_v4t_a_le_mt.a
374	LOAD /home/phil/CrossWorks_ARM_1_7/lib/libc_targetio_impl_v4t_a_le_mt.a
375	LOAD /home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le_mt.a
376	LOAD /home/phil/CrossWorks_ARM_1_7/lib/lib_vfscanf_long_v4t_a_le_mt.a
377	END GROUP
378	OUTPUT(ARM Flash Release/CrossWorks_TaskingLib_Test.elf elf32-littlearm)
379
380	.comment 0x00000000 0x6c
381	.comment 0x00000000 0x12 ARM Flash Release/main_ctl.o
382	.comment 0x00000012 0x12 ARM Flash Release/main.o
383	.comment 0x00000024 0x12 ARM Flash Release/LPC230x.o
384	.comment 0x00000036 0x12 ARM Flash Release/VIC_PL192.o
385	.comment 0x00000048 0x12 /home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl.o)
386	.comment 0x0000005a 0x12 /home/phil/CrossWorks_ARM_1_7/lib/liblpc2000_v4t_a_le_mt.a(liblpc2000_lpc23xx_get_cclk.o)
387
388	.debug_abbrev 0x00000000 0x58
389	.debug_abbrev 0x00000000 0x58 /home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl.o)
390
391	.debug_info 0x00000000 0x11c
392	.debug_info 0x00000000 0x11c /home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl.o)
393
394	.debug_line 0x00000000 0x67
395	.debug_line 0x00000000 0x67 /home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl.o)
396
397	.debug_frame 0x00000000 0x1dc
398	.debug_frame 0x00000000 0x17c /home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl.o)
399	.debug_frame 0x0000017c 0x20 /home/phil/CrossWorks_ARM_1_7/lib/libarmdi_v4t_a_le_mt.a(libarm_set_irq.o)
400	.debug_frame 0x0000019c 0x20 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le_mt.a(__int32_udivmod.o)
401	.debug_frame 0x000001bc 0x20 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le_mt.a(memset.o)
402
403	.debug_loc 0x00000000 0x155
404	.debug_loc 0x00000000 0x155 /home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl.o)
405
406	.debug_pubnames
407	0x00000000 0x106
408	.debug_pubnames
409	0x00000000 0x106 /home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl.o)
410
411	.debug_aranges 0x00000000 0x20
412	.debug_aranges
413	0x00000000 0x20 /home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl.o)
414
415	.debug_str 0x00000000 0x154
416	.debug_str 0x00000000 0x154 /home/phil/CrossWorks_ARM_1_7/ctl/lib/libctl_v4t_a_le_mt.a(ctl.o)

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