| 1 |
Archive member included because of file (symbol) |
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| 2 |
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| 3 |
/home/phil/CrossWorks_ARM_1_7/lib/liblpc2000_v4t_a_le.a(liblpc2000_lpc23xx_get_cclk.o) |
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| 4 |
ARM RAM Debug/LPC230x.o (liblpc2000_lpc23xx_get_cclk) |
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| 5 |
/home/phil/CrossWorks_ARM_1_7/lib/libarmdi_v4t_a_le.a(libarm_enable_irq.o) |
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| 6 |
ARM RAM Debug/tcpip.o (__ARMLIB_enableIRQ) |
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| 7 |
/home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__int32_udivmod.o) |
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| 8 |
/home/phil/CrossWorks_ARM_1_7/lib/liblpc2000_v4t_a_le.a(liblpc2000_lpc23xx_get_cclk.o) (__udivsi3) |
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| 9 |
/home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcpy.o) |
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| 10 |
ARM RAM Debug/easyweb.o (memcpy) |
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| 11 |
/home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memset.o) |
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| 12 |
ARM RAM Debug/tcpip.o (memset) |
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| 13 |
/home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcmp.o) |
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| 14 |
ARM RAM Debug/tcpip.o (memcmp) |
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| 15 |
/home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(sprintf.o) |
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| 16 |
ARM RAM Debug/easyweb.o (sprintf) |
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| 17 |
/home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le.a(__vfprintf_long.o) |
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| 18 |
/home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(sprintf.o) (__vfprintf) |
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| 19 |
/home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(strlen.o) |
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| 20 |
/home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le.a(__vfprintf_long.o) (strlen) |
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| 21 |
/home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__hex_lc_uc.o) |
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| 22 |
/home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le.a(__vfprintf_long.o) (__hex_uc) |
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| 23 |
|
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| 24 |
Allocating common symbols |
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| 25 |
Common symbol size file |
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| 26 |
|
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| 27 |
TCPTimer 0x1 ARM RAM Debug/easyweb.o |
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| 28 |
HTTPBytesToSend 0x4 ARM RAM Debug/easyweb.o |
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| 29 |
TCPRxDataCount 0x2 ARM RAM Debug/easyweb.o |
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| 30 |
HTTPStatus 0x1 ARM RAM Debug/easyweb.o |
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| 31 |
TCPTxDataCount 0x2 ARM RAM Debug/easyweb.o |
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| 32 |
RecdFrameIP 0x4 ARM RAM Debug/easyweb.o |
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| 33 |
RemoteMAC 0x6 ARM RAM Debug/easyweb.o |
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| 34 |
TCPStateMachine 0x4 ARM RAM Debug/easyweb.o |
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| 35 |
TCPUNASeqNr 0x4 ARM RAM Debug/easyweb.o |
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| 36 |
TCPLocalPort 0x2 ARM RAM Debug/easyweb.o |
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| 37 |
_RxTCPBuffer 0x100 ARM RAM Debug/easyweb.o |
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| 38 |
TCPFlags 0x1 ARM RAM Debug/easyweb.o |
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| 39 |
RecdFrameMAC 0x6 ARM RAM Debug/easyweb.o |
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| 40 |
RecdIPFrameLength 0x2 ARM RAM Debug/easyweb.o |
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| 41 |
PWebSide 0x4 ARM RAM Debug/easyweb.o |
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| 42 |
RemoteIP 0x4 ARM RAM Debug/easyweb.o |
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| 43 |
LastFrameSent 0x4 ARM RAM Debug/easyweb.o |
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| 44 |
TCPRemotePort 0x2 ARM RAM Debug/easyweb.o |
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| 45 |
TxFrame2Size 0x1 ARM RAM Debug/easyweb.o |
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| 46 |
TCPAckNr 0x4 ARM RAM Debug/easyweb.o |
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| 47 |
TransmitControl 0x1 ARM RAM Debug/easyweb.o |
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| 48 |
TxFrame1Size 0x2 ARM RAM Debug/easyweb.o |
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| 49 |
ISNGenHigh 0x2 ARM RAM Debug/easyweb.o |
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| 50 |
_TxFrame2 0x4a ARM RAM Debug/easyweb.o |
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| 51 |
RecdFrameLength 0x2 ARM RAM Debug/easyweb.o |
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| 52 |
_TxFrame1 0x236 ARM RAM Debug/easyweb.o |
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| 53 |
TCPSeqNr 0x4 ARM RAM Debug/easyweb.o |
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| 54 |
RetryCounter 0x1 ARM RAM Debug/easyweb.o |
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| 55 |
SocketStatus 0x1 ARM RAM Debug/easyweb.o |
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| 56 |
|
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| 57 |
Memory Configuration |
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| 58 |
|
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| 59 |
Name Origin Length Attributes |
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| 60 |
UNPLACED_SECTIONS 0xffffffff 0x00000000 xw |
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| 61 |
AHB_Peripherals 0xffe00000 0x00200000 xw |
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| 62 |
Battery_RAM 0xe0084000 0x00000800 xw |
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| 63 |
APB_Peripherals 0xe0000000 0x00200000 xw |
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| 64 |
USB_RAM 0x7fd00000 0x00002000 xw |
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| 65 |
Ethernet_RAM 0x7fe00000 0x00004000 xw |
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| 66 |
SRAM 0x40000000 0x00008000 xw |
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| 67 |
FLASH 0x00000000 0x00080000 xr |
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| 68 |
*default* 0x00000000 0xffffffff |
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| 69 |
|
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| 70 |
Linker script and memory map |
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| 71 |
|
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| 72 |
0xffe00000 __AHB_Peripherals_segment_start__ = 0xffe00000 |
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| 73 |
0x00000000 __AHB_Peripherals_segment_end__ = 0x0 |
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| 74 |
0xe0084000 __Battery_RAM_segment_start__ = 0xe0084000 |
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| 75 |
0xe0084800 __Battery_RAM_segment_end__ = 0xe0084800 |
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| 76 |
0xe0000000 __APB_Peripherals_segment_start__ = 0xe0000000 |
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| 77 |
0xe0200000 __APB_Peripherals_segment_end__ = 0xe0200000 |
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| 78 |
0x7fd00000 __USB_RAM_segment_start__ = 0x7fd00000 |
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| 79 |
0x7fd02000 __USB_RAM_segment_end__ = 0x7fd02000 |
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| 80 |
0x7fe00000 __Ethernet_RAM_segment_start__ = 0x7fe00000 |
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| 81 |
0x7fe04000 __Ethernet_RAM_segment_end__ = 0x7fe04000 |
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| 82 |
0x40000000 __SRAM_segment_start__ = 0x40000000 |
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| 83 |
0x40008000 __SRAM_segment_end__ = 0x40008000 |
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| 84 |
0x00000000 __FLASH_segment_start__ = 0x0 |
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| 85 |
0x00080000 __FLASH_segment_end__ = 0x80000 |
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| 86 |
0x00000400 __STACKSIZE__ = 0x400 |
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| 87 |
0x00000100 __STACKSIZE_IRQ__ = 0x100 |
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| 88 |
0x00000100 __STACKSIZE_FIQ__ = 0x100 |
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| 89 |
0x00000000 __STACKSIZE_SVC__ = 0x0 |
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| 90 |
0x00000000 __STACKSIZE_ABT__ = 0x0 |
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| 91 |
0x00000000 __STACKSIZE_UND__ = 0x0 |
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| 92 |
0x00000400 __HEAPSIZE__ = 0x400 |
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| 93 |
0x40000000 __vectors_load_start__ = __SRAM_segment_start__ |
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| 94 |
|
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| 95 |
.vectors 0x40000000 0x38 |
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| 96 |
0x40000000 __vectors_start__ = . |
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| 97 |
*(.vectors .vectors.*) |
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| 98 |
.vectors 0x40000000 0x38 ARM RAM Debug/Philips_LPC230X_Startup.o |
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| 99 |
0x40000000 _vectors |
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| 100 |
0x40000038 __vectors_end__ = (__vectors_start__ + SIZEOF (.vectors)) |
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| 101 |
0x00000001 . = ASSERT (((__vectors_end__ >= __SRAM_segment_start__) && (__vectors_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .vectors is too large to fit in SRAM memory segment) |
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| 102 |
0x40000038 __fast_load_start__ = (__vectors_end__ ALIGN 0x4) |
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| 103 |
|
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| 104 |
.fast 0x40000038 0x0 |
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| 105 |
0x40000038 __fast_start__ = . |
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| 106 |
*(.fast .fast.*) |
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| 107 |
0x40000038 __fast_end__ = (__fast_start__ + SIZEOF (.fast)) |
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| 108 |
0x00000001 . = ASSERT (((__fast_end__ >= __SRAM_segment_start__) && (__fast_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .fast is too large to fit in SRAM memory segment) |
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| 109 |
0x40000038 __init_load_start__ = (__fast_end__ ALIGN 0x4) |
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| 110 |
|
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| 111 |
.init 0x40000038 0x2e0 |
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| 112 |
0x40000038 __init_start__ = . |
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| 113 |
*(.init .init.*) |
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| 114 |
*fill* 0x40000038 0x8 00 |
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| 115 |
.init 0x40000040 0x1d0 ARM RAM Debug/crt0.o |
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| 116 |
0x40000040 __start |
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| 117 |
0x40000040 _start |
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| 118 |
.init 0x40000210 0x108 ARM RAM Debug/Philips_LPC230X_Startup.o |
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| 119 |
0x40000210 reset_handler |
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| 120 |
0x400002fc undef_handler |
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| 121 |
0x40000304 pabort_handler |
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| 122 |
0x40000308 dabort_handler |
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| 123 |
0x40000300 swi_handler |
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| 124 |
0x4000030c fiq_handler |
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| 125 |
0x40000318 __init_end__ = (__init_start__ + SIZEOF (.init)) |
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| 126 |
0x00000001 . = ASSERT (((__init_end__ >= __SRAM_segment_start__) && (__init_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .init is too large to fit in SRAM memory segment) |
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| 127 |
0x40000318 __text_load_start__ = (__init_end__ ALIGN 0x4) |
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| 128 |
|
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| 129 |
.text 0x40000318 0x4488 |
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| 130 |
0x40000318 __text_start__ = . |
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| 131 |
*(.text .text.* .glue_7t .glue_7 .gnu.linkonce.t.* .gcc_except_table) |
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| 132 |
.text 0x40000318 0x474 ARM RAM Debug/easyweb.o |
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| 133 |
0x40000688 InsertDynamicValues |
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| 134 |
0x400005ec GetAD0Val |
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| 135 |
0x400003cc HTTPServer |
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| 136 |
0x40000318 main |
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| 137 |
.glue_7 0x4000078c 0x0 ARM RAM Debug/easyweb.o |
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| 138 |
.glue_7t 0x4000078c 0x0 ARM RAM Debug/easyweb.o |
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| 139 |
.text 0x4000078c 0xcac ARM RAM Debug/EMAC.o |
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| 140 |
0x4000132c WriteFrame_EMAC |
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| 141 |
0x40001128 StartReadFrame |
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| 142 |
0x40000fc4 ReadFrame_EMAC |
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| 143 |
0x4000078c write_PHY |
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| 144 |
0x40001058 CopyFromFrame_EMAC |
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| 145 |
0x4000082c read_PHY |
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| 146 |
0x400011c4 EndReadFrame |
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| 147 |
0x40001004 ReadFrameBE_EMAC |
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| 148 |
0x4000130c Rdy4Tx |
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| 149 |
0x400008fc rx_descr_init |
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| 150 |
0x400010e4 DummyReadFrame_EMAC |
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| 151 |
0x40001370 CopyToFrame_EMAC |
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| 152 |
0x40000a2c tx_descr_init |
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| 153 |
0x40000b48 Init_EMAC |
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| 154 |
0x40001228 CheckFrameReceived |
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| 155 |
0x40001288 RequestSend |
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| 156 |
.glue_7 0x40001438 0x0 ARM RAM Debug/EMAC.o |
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| 157 |
.glue_7t 0x40001438 0x0 ARM RAM Debug/EMAC.o |
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| 158 |
.text 0x40001438 0x0 ARM RAM Debug/Retarget.o |
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| 159 |
.glue_7 0x40001438 0x0 ARM RAM Debug/Retarget.o |
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| 160 |
.glue_7t 0x40001438 0x0 ARM RAM Debug/Retarget.o |
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| 161 |
.text 0x40001438 0x2414 ARM RAM Debug/tcpip.o |
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| 162 |
0x40003518 TCPHandleRetransmission |
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| 163 |
0x40003610 TCPClockHandler |
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| 164 |
0x400034e8 TCPStopTimer |
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| 165 |
0x40001c2c ProcessEthBroadcastFrame |
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| 166 |
0x40001788 IsBroadcast |
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| 167 |
0x400014f8 TCPPassiveOpen |
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| 168 |
0x4000326c CalcChecksum |
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| 169 |
0x40001834 DoNetworkStuff |
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| 170 |
0x400015ec TCPClose |
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| 171 |
0x400035a4 TCPHandleTimeout |
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| 172 |
0x400016a8 TCPTransmitTxBuffer |
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| 173 |
0x40002c70 PrepareTCP_FRAME |
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| 174 |
0x40002ffc PrepareTCP_DATA_FRAME |
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| 175 |
0x40001f10 ProcessTCPFrame |
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| 176 |
0x40002a38 PrepareICMP_ECHO_REPLY |
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| 177 |
0x400028e8 PrepareARP_ANSWER |
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| 178 |
0x40001d08 ProcessEthIAFrame |
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| 179 |
0x40001558 TCPActiveOpen |
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| 180 |
0x40003468 TCPStartTimeWaitTimer |
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| 181 |
0x40003758 WriteDWBE |
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| 182 |
0x400036f8 WriteWBE |
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| 183 |
0x400037ec SwapBytes |
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| 184 |
0x400034c0 TCPRestartTimer |
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| 185 |
0x400036c0 SendFrame2 |
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| 186 |
0x400033fc TCPStartRetryTimer |
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| 187 |
0x40001438 TCPLowLevelInit |
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| 188 |
0x40001ec4 ProcessICMPFrame |
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| 189 |
0x40001678 TCPReleaseRxBuffer |
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| 190 |
0x40003688 SendFrame1 |
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| 191 |
0x40002708 PrepareARP_REQUEST |
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| 192 |
.glue_7 0x4000384c 0x0 ARM RAM Debug/tcpip.o |
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| 193 |
.glue_7t 0x4000384c 0x0 ARM RAM Debug/tcpip.o |
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| 194 |
.text 0x4000384c 0x40 ARM RAM Debug/catch_irqs.o |
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| 195 |
0x4000384c irq_handler() |
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| 196 |
0x4000386c swi_handler() |
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| 197 |
0x4000385c fiq_handler() |
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| 198 |
0x4000387c undef_handler() |
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| 199 |
.glue_7 0x4000388c 0x0 ARM RAM Debug/catch_irqs.o |
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| 200 |
.glue_7t 0x4000388c 0x0 ARM RAM Debug/catch_irqs.o |
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| 201 |
.text 0x4000388c 0x0 ARM RAM Debug/crt0.o |
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| 202 |
.glue_7 0x4000388c 0x0 ARM RAM Debug/crt0.o |
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| 203 |
.glue_7t 0x4000388c 0x0 ARM RAM Debug/crt0.o |
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| 204 |
.text 0x4000388c 0x0 ARM RAM Debug/Philips_LPC230X_Startup.o |
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| 205 |
.glue_7 0x4000388c 0x0 ARM RAM Debug/Philips_LPC230X_Startup.o |
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| 206 |
.glue_7t 0x4000388c 0x0 ARM RAM Debug/Philips_LPC230X_Startup.o |
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| 207 |
.text 0x4000388c 0x2fc ARM RAM Debug/LPC230x.o |
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| 208 |
0x40003b68 ctl_get_ticks_per_second |
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| 209 |
0x40003a70 ctl_start_timer |
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| 210 |
0x40003914 get_uart_clk |
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| 211 |
.glue_7 0x40003b88 0x0 ARM RAM Debug/LPC230x.o |
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| 212 |
.glue_7t 0x40003b88 0x0 ARM RAM Debug/LPC230x.o |
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| 213 |
.text 0x40003b88 0x168 ARM RAM Debug/VIC_PL192.o |
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| 214 |
0x40003c70 ctl_unmask_isr |
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| 215 |
0x40003b88 ctl_set_isr |
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| 216 |
0x40003cb0 ctl_mask_isr |
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| 217 |
.glue_7 0x40003cf0 0x0 ARM RAM Debug/VIC_PL192.o |
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| 218 |
.glue_7t 0x40003cf0 0x0 ARM RAM Debug/VIC_PL192.o |
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| 219 |
.text 0x40003cf0 0x44 ARM RAM Debug/VIC_PL192_irq_handler.o |
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| 220 |
0x40003cf0 irq_handler |
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| 221 |
.glue_7 0x40003d34 0x0 ARM RAM Debug/VIC_PL192_irq_handler.o |
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| 222 |
.glue_7t 0x40003d34 0x0 ARM RAM Debug/VIC_PL192_irq_handler.o |
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| 223 |
.text 0x40003d34 0x0 /home/phil/CrossWorks_ARM_1_7/lib/liblpc2000_v4t_a_le.a(liblpc2000_lpc23xx_get_cclk.o) |
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| 224 |
.text.liblpc2000 |
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| 225 |
0x40003d34 0x98 /home/phil/CrossWorks_ARM_1_7/lib/liblpc2000_v4t_a_le.a(liblpc2000_lpc23xx_get_cclk.o) |
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| 226 |
0x40003d34 liblpc2000_lpc23xx_get_cclk |
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| 227 |
.glue_7 0x40003dcc 0x0 /home/phil/CrossWorks_ARM_1_7/lib/liblpc2000_v4t_a_le.a(liblpc2000_lpc23xx_get_cclk.o) |
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| 228 |
.glue_7t 0x40003dcc 0x0 /home/phil/CrossWorks_ARM_1_7/lib/liblpc2000_v4t_a_le.a(liblpc2000_lpc23xx_get_cclk.o) |
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| 229 |
.text 0x40003dcc 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libarmdi_v4t_a_le.a(libarm_enable_irq.o) |
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| 230 |
*fill* 0x40003dcc 0x4 00 |
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| 231 |
.text.libc 0x40003dd0 0x10 /home/phil/CrossWorks_ARM_1_7/lib/libarmdi_v4t_a_le.a(libarm_enable_irq.o) |
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| 232 |
0x40003dd0 __ARMLIB_enableIRQ |
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| 233 |
0x40003dd0 libarm_enable_irq |
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| 234 |
.glue_7 0x40003de0 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libarmdi_v4t_a_le.a(libarm_enable_irq.o) |
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| 235 |
.glue_7t 0x40003de0 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libarmdi_v4t_a_le.a(libarm_enable_irq.o) |
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| 236 |
.text 0x40003de0 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__int32_udivmod.o) |
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| 237 |
.text.libc 0x40003de0 0x30 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__int32_udivmod.o) |
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| 238 |
0x40003de0 __int32_udiv |
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| 239 |
0x40003de0 __int32_udivmod |
|---|
| 240 |
0x40003de0 __udivsi3 |
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| 241 |
.glue_7 0x40003e10 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__int32_udivmod.o) |
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| 242 |
.glue_7t 0x40003e10 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__int32_udivmod.o) |
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| 243 |
.text 0x40003e10 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcpy.o) |
|---|
| 244 |
.text.libc 0x40003e10 0x60 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcpy.o) |
|---|
| 245 |
0x40003e10 memcpy |
|---|
| 246 |
.glue_7 0x40003e70 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcpy.o) |
|---|
| 247 |
.glue_7t 0x40003e70 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcpy.o) |
|---|
| 248 |
.text 0x40003e70 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memset.o) |
|---|
| 249 |
.text.libc 0x40003e70 0xa0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memset.o) |
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| 250 |
0x40003e70 memset |
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| 251 |
.glue_7 0x40003f10 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memset.o) |
|---|
| 252 |
.glue_7t 0x40003f10 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memset.o) |
|---|
| 253 |
.text 0x40003f10 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcmp.o) |
|---|
| 254 |
.text.libc 0x40003f10 0x68 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcmp.o) |
|---|
| 255 |
0x40003f10 memcmp |
|---|
| 256 |
.glue_7 0x40003f78 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcmp.o) |
|---|
| 257 |
.glue_7t 0x40003f78 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcmp.o) |
|---|
| 258 |
.text 0x40003f78 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(sprintf.o) |
|---|
| 259 |
.text.libc 0x40003f78 0x44 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(sprintf.o) |
|---|
| 260 |
0x40003f78 sprintf |
|---|
| 261 |
.glue_7 0x40003fbc 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(sprintf.o) |
|---|
| 262 |
.glue_7t 0x40003fbc 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(sprintf.o) |
|---|
| 263 |
.text 0x40003fbc 0x0 /home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le.a(__vfprintf_long.o) |
|---|
| 264 |
.text.libc 0x40003fbc 0x780 /home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le.a(__vfprintf_long.o) |
|---|
| 265 |
0x40004078 __vfprintf |
|---|
| 266 |
.glue_7 0x4000473c 0x0 /home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le.a(__vfprintf_long.o) |
|---|
| 267 |
.glue_7t 0x4000473c 0x0 /home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le.a(__vfprintf_long.o) |
|---|
| 268 |
.text 0x4000473c 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(strlen.o) |
|---|
| 269 |
*fill* 0x4000473c 0x4 00 |
|---|
| 270 |
.text.libc 0x40004740 0x60 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(strlen.o) |
|---|
| 271 |
0x40004740 strlen |
|---|
| 272 |
.glue_7 0x400047a0 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(strlen.o) |
|---|
| 273 |
.glue_7t 0x400047a0 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(strlen.o) |
|---|
| 274 |
.text 0x400047a0 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__hex_lc_uc.o) |
|---|
| 275 |
.text.libc 0x400047a0 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__hex_lc_uc.o) |
|---|
| 276 |
.glue_7 0x400047a0 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__hex_lc_uc.o) |
|---|
| 277 |
.glue_7t 0x400047a0 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__hex_lc_uc.o) |
|---|
| 278 |
0x400047a0 __text_end__ = (__text_start__ + SIZEOF (.text)) |
|---|
| 279 |
0x00000001 . = ASSERT (((__text_end__ >= __SRAM_segment_start__) && (__text_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .text is too large to fit in SRAM memory segment) |
|---|
| 280 |
0x400047a0 __dtors_load_start__ = (__text_end__ ALIGN 0x4) |
|---|
| 281 |
|
|---|
| 282 |
.dtors 0x400047a0 0x0 |
|---|
| 283 |
0x400047a0 __dtors_start__ = . |
|---|
| 284 |
*(SORT(.dtors.*)) |
|---|
| 285 |
*(.dtors) |
|---|
| 286 |
0x400047a0 __dtors_end__ = (__dtors_start__ + SIZEOF (.dtors)) |
|---|
| 287 |
0x00000001 . = ASSERT (((__dtors_end__ >= __SRAM_segment_start__) && (__dtors_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .dtors is too large to fit in SRAM memory segment) |
|---|
| 288 |
0x400047a0 __ctors_load_start__ = (__dtors_end__ ALIGN 0x4) |
|---|
| 289 |
|
|---|
| 290 |
.ctors 0x400047a0 0x0 |
|---|
| 291 |
0x400047a0 __ctors_start__ = . |
|---|
| 292 |
*(SORT(.ctors.*)) |
|---|
| 293 |
*(.ctors) |
|---|
| 294 |
0x400047a0 __ctors_end__ = (__ctors_start__ + SIZEOF (.ctors)) |
|---|
| 295 |
0x00000001 . = ASSERT (((__ctors_end__ >= __SRAM_segment_start__) && (__ctors_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .ctors is too large to fit in SRAM memory segment) |
|---|
| 296 |
0x400047a0 __data_load_start__ = (__ctors_end__ ALIGN 0x4) |
|---|
| 297 |
|
|---|
| 298 |
.data 0x400047a0 0x0 |
|---|
| 299 |
0x400047a0 __data_start__ = . |
|---|
| 300 |
*(.data .data.* .gnu.linkonce.d.*) |
|---|
| 301 |
.data 0x400047a0 0x0 ARM RAM Debug/easyweb.o |
|---|
| 302 |
.data 0x400047a0 0x0 ARM RAM Debug/EMAC.o |
|---|
| 303 |
.data 0x400047a0 0x0 ARM RAM Debug/Retarget.o |
|---|
| 304 |
.data 0x400047a0 0x0 ARM RAM Debug/tcpip.o |
|---|
| 305 |
.data 0x400047a0 0x0 ARM RAM Debug/catch_irqs.o |
|---|
| 306 |
.data 0x400047a0 0x0 ARM RAM Debug/crt0.o |
|---|
| 307 |
.data 0x400047a0 0x0 ARM RAM Debug/Philips_LPC230X_Startup.o |
|---|
| 308 |
.data 0x400047a0 0x0 ARM RAM Debug/LPC230x.o |
|---|
| 309 |
.data 0x400047a0 0x0 ARM RAM Debug/VIC_PL192.o |
|---|
| 310 |
.data 0x400047a0 0x0 ARM RAM Debug/VIC_PL192_irq_handler.o |
|---|
| 311 |
.data 0x400047a0 0x0 /home/phil/CrossWorks_ARM_1_7/lib/liblpc2000_v4t_a_le.a(liblpc2000_lpc23xx_get_cclk.o) |
|---|
| 312 |
.data 0x400047a0 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libarmdi_v4t_a_le.a(libarm_enable_irq.o) |
|---|
| 313 |
.data 0x400047a0 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__int32_udivmod.o) |
|---|
| 314 |
.data 0x400047a0 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcpy.o) |
|---|
| 315 |
.data 0x400047a0 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memset.o) |
|---|
| 316 |
.data 0x400047a0 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcmp.o) |
|---|
| 317 |
.data 0x400047a0 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(sprintf.o) |
|---|
| 318 |
.data 0x400047a0 0x0 /home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le.a(__vfprintf_long.o) |
|---|
| 319 |
.data 0x400047a0 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(strlen.o) |
|---|
| 320 |
.data 0x400047a0 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__hex_lc_uc.o) |
|---|
| 321 |
0x400047a0 __data_end__ = (__data_start__ + SIZEOF (.data)) |
|---|
| 322 |
0x00000001 . = ASSERT (((__data_end__ >= __SRAM_segment_start__) && (__data_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .data is too large to fit in SRAM memory segment) |
|---|
| 323 |
0x400047a0 __rodata_load_start__ = (__data_end__ ALIGN 0x4) |
|---|
| 324 |
|
|---|
| 325 |
.rodata 0x400047a0 0x4bc |
|---|
| 326 |
0x400047a0 __rodata_start__ = . |
|---|
| 327 |
*(.rodata .rodata.* .gnu.linkonce.r.*) |
|---|
| 328 |
.rodata 0x400047a0 0x494 ARM RAM Debug/easyweb.o |
|---|
| 329 |
0x400047a0 GetResponse |
|---|
| 330 |
0x400047d2 SubnetMask |
|---|
| 331 |
0x400047d6 GatewayIP |
|---|
| 332 |
0x400047dc WebSide |
|---|
| 333 |
0x400047ce MyIP |
|---|
| 334 |
.rodata 0x40004c34 0x6 ARM RAM Debug/tcpip.o |
|---|
| 335 |
0x40004c34 MyMAC |
|---|
| 336 |
*fill* 0x40004c3a 0x2 00 |
|---|
| 337 |
.rodata.libc 0x40004c3c 0x20 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__hex_lc_uc.o) |
|---|
| 338 |
0x40004c3c __hex_uc |
|---|
| 339 |
0x40004c4c __hex_lc |
|---|
| 340 |
0x40004c5c __rodata_end__ = (__rodata_start__ + SIZEOF (.rodata)) |
|---|
| 341 |
0x00000001 . = ASSERT (((__rodata_end__ >= __SRAM_segment_start__) && (__rodata_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .rodata is too large to fit in SRAM memory segment) |
|---|
| 342 |
0x40004c5c __bss_load_start__ = (__rodata_end__ ALIGN 0x4) |
|---|
| 343 |
|
|---|
| 344 |
.bss 0x40004c5c 0x3da |
|---|
| 345 |
0x40004c5c __bss_start__ = . |
|---|
| 346 |
*(.bss .bss.* .gnu.linkonce.b.*) |
|---|
| 347 |
.bss 0x40004c5c 0x0 ARM RAM Debug/easyweb.o |
|---|
| 348 |
.bss 0x40004c5c 0x8 ARM RAM Debug/EMAC.o |
|---|
| 349 |
.bss 0x40004c64 0x0 ARM RAM Debug/Retarget.o |
|---|
| 350 |
.bss 0x40004c64 0x0 ARM RAM Debug/tcpip.o |
|---|
| 351 |
.bss 0x40004c64 0x0 ARM RAM Debug/catch_irqs.o |
|---|
| 352 |
.bss 0x40004c64 0x0 ARM RAM Debug/crt0.o |
|---|
| 353 |
.bss 0x40004c64 0x0 ARM RAM Debug/Philips_LPC230X_Startup.o |
|---|
| 354 |
.bss 0x40004c64 0x4 ARM RAM Debug/LPC230x.o |
|---|
| 355 |
.bss 0x40004c68 0x0 ARM RAM Debug/VIC_PL192.o |
|---|
| 356 |
.bss 0x40004c68 0x0 ARM RAM Debug/VIC_PL192_irq_handler.o |
|---|
| 357 |
.bss 0x40004c68 0x0 /home/phil/CrossWorks_ARM_1_7/lib/liblpc2000_v4t_a_le.a(liblpc2000_lpc23xx_get_cclk.o) |
|---|
| 358 |
.bss 0x40004c68 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libarmdi_v4t_a_le.a(libarm_enable_irq.o) |
|---|
| 359 |
.bss 0x40004c68 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__int32_udivmod.o) |
|---|
| 360 |
.bss 0x40004c68 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcpy.o) |
|---|
| 361 |
.bss 0x40004c68 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memset.o) |
|---|
| 362 |
.bss 0x40004c68 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(memcmp.o) |
|---|
| 363 |
.bss 0x40004c68 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(sprintf.o) |
|---|
| 364 |
.bss 0x40004c68 0x0 /home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le.a(__vfprintf_long.o) |
|---|
| 365 |
.bss 0x40004c68 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(strlen.o) |
|---|
| 366 |
.bss 0x40004c68 0x0 /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a(__hex_lc_uc.o) |
|---|
| 367 |
*(COMMON) |
|---|
| 368 |
COMMON 0x40004c68 0x3ce ARM RAM Debug/easyweb.o |
|---|
| 369 |
0x40004c68 TCPTimer |
|---|
| 370 |
0x40004c6c HTTPBytesToSend |
|---|
| 371 |
0x40004c70 TCPRxDataCount |
|---|
| 372 |
0x40004c72 HTTPStatus |
|---|
| 373 |
0x40004c74 TCPTxDataCount |
|---|
| 374 |
0x40004c76 RecdFrameIP |
|---|
| 375 |
0x40004c7a RemoteMAC |
|---|
| 376 |
0x40004c80 TCPStateMachine |
|---|
| 377 |
0x40004c84 TCPUNASeqNr |
|---|
| 378 |
0x40004c88 TCPLocalPort |
|---|
| 379 |
0x40004c8a _RxTCPBuffer |
|---|
| 380 |
0x40004d8a TCPFlags |
|---|
| 381 |
0x40004d8c RecdFrameMAC |
|---|
| 382 |
0x40004d92 RecdIPFrameLength |
|---|
| 383 |
0x40004d94 PWebSide |
|---|
| 384 |
0x40004d98 RemoteIP |
|---|
| 385 |
0x40004d9c LastFrameSent |
|---|
| 386 |
0x40004da0 TCPRemotePort |
|---|
| 387 |
0x40004da2 TxFrame2Size |
|---|
| 388 |
0x40004da4 TCPAckNr |
|---|
| 389 |
0x40004da8 TransmitControl |
|---|
| 390 |
0x40004daa TxFrame1Size |
|---|
| 391 |
0x40004dac ISNGenHigh |
|---|
| 392 |
0x40004dae _TxFrame2 |
|---|
| 393 |
0x40004df8 RecdFrameLength |
|---|
| 394 |
0x40004dfa _TxFrame1 |
|---|
| 395 |
0x40005030 TCPSeqNr |
|---|
| 396 |
0x40005034 RetryCounter |
|---|
| 397 |
0x40005035 SocketStatus |
|---|
| 398 |
0x40005036 __bss_end__ = (__bss_start__ + SIZEOF (.bss)) |
|---|
| 399 |
0x00000001 . = ASSERT (((__bss_end__ >= __SRAM_segment_start__) && (__bss_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .bss is too large to fit in SRAM memory segment) |
|---|
| 400 |
0x40005038 __non_init_load_start__ = (__bss_end__ ALIGN 0x4) |
|---|
| 401 |
|
|---|
| 402 |
.non_init 0x40005038 0x0 |
|---|
| 403 |
0x40005038 __non_init_start__ = . |
|---|
| 404 |
*(.non_init .non_init.*) |
|---|
| 405 |
0x40005038 __non_init_end__ = (__non_init_start__ + SIZEOF (.non_init)) |
|---|
| 406 |
0x00000001 . = ASSERT (((__non_init_end__ >= __SRAM_segment_start__) && (__non_init_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .non_init is too large to fit in SRAM memory segment) |
|---|
| 407 |
0x40005038 __heap_load_start__ = (__non_init_end__ ALIGN 0x4) |
|---|
| 408 |
|
|---|
| 409 |
.heap 0x40005038 0x400 |
|---|
| 410 |
0x40005038 __heap_start__ = . |
|---|
| 411 |
*(.heap) |
|---|
| 412 |
0x40005438 . = (((__heap_start__ + __HEAPSIZE__) MAX_K .) ALIGN 0x4) |
|---|
| 413 |
*fill* 0x40005038 0x400 00 |
|---|
| 414 |
0x40005438 __heap_end__ = (__heap_start__ + SIZEOF (.heap)) |
|---|
| 415 |
0x00000001 . = ASSERT (((__heap_end__ >= __SRAM_segment_start__) && (__heap_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .heap is too large to fit in SRAM memory segment) |
|---|
| 416 |
0x40005438 __stack_load_start__ = (__heap_end__ ALIGN 0x4) |
|---|
| 417 |
|
|---|
| 418 |
.stack 0x40005438 0x400 |
|---|
| 419 |
0x40005438 __stack_start__ = . |
|---|
| 420 |
*(.stack) |
|---|
| 421 |
0x40005838 . = (((__stack_start__ + __STACKSIZE__) MAX_K .) ALIGN 0x4) |
|---|
| 422 |
*fill* 0x40005438 0x400 00 |
|---|
| 423 |
0x40005838 __stack_end__ = (__stack_start__ + SIZEOF (.stack)) |
|---|
| 424 |
0x00000001 . = ASSERT (((__stack_end__ >= __SRAM_segment_start__) && (__stack_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .stack is too large to fit in SRAM memory segment) |
|---|
| 425 |
0x40005838 __stack_irq_load_start__ = (__stack_end__ ALIGN 0x4) |
|---|
| 426 |
|
|---|
| 427 |
.stack_irq 0x40005838 0x100 |
|---|
| 428 |
0x40005838 __stack_irq_start__ = . |
|---|
| 429 |
*(.stack_irq) |
|---|
| 430 |
0x40005938 . = (((__stack_irq_start__ + __STACKSIZE_IRQ__) MAX_K .) ALIGN 0x4) |
|---|
| 431 |
*fill* 0x40005838 0x100 00 |
|---|
| 432 |
0x40005938 __stack_irq_end__ = (__stack_irq_start__ + SIZEOF (.stack_irq)) |
|---|
| 433 |
0x00000001 . = ASSERT (((__stack_irq_end__ >= __SRAM_segment_start__) && (__stack_irq_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .stack_irq is too large to fit in SRAM memory segment) |
|---|
| 434 |
0x40005938 __stack_fiq_load_start__ = (__stack_irq_end__ ALIGN 0x4) |
|---|
| 435 |
|
|---|
| 436 |
.stack_fiq 0x40005938 0x100 |
|---|
| 437 |
0x40005938 __stack_fiq_start__ = . |
|---|
| 438 |
*(.stack_fiq) |
|---|
| 439 |
0x40005a38 . = (((__stack_fiq_start__ + __STACKSIZE_FIQ__) MAX_K .) ALIGN 0x4) |
|---|
| 440 |
*fill* 0x40005938 0x100 00 |
|---|
| 441 |
0x40005a38 __stack_fiq_end__ = (__stack_fiq_start__ + SIZEOF (.stack_fiq)) |
|---|
| 442 |
0x00000001 . = ASSERT (((__stack_fiq_end__ >= __SRAM_segment_start__) && (__stack_fiq_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .stack_fiq is too large to fit in SRAM memory segment) |
|---|
| 443 |
0x40005a38 __stack_svc_load_start__ = (__stack_fiq_end__ ALIGN 0x4) |
|---|
| 444 |
|
|---|
| 445 |
.stack_svc 0x40005a38 0x0 |
|---|
| 446 |
0x40005a38 __stack_svc_start__ = . |
|---|
| 447 |
*(.stack_svc) |
|---|
| 448 |
0x40005a3c . = (((__stack_svc_start__ + __STACKSIZE_SVC__) MAX_K .) ALIGN 0x4) |
|---|
| 449 |
0x40005a38 __stack_svc_end__ = (__stack_svc_start__ + SIZEOF (.stack_svc)) |
|---|
| 450 |
0x00000001 . = ASSERT (((__stack_svc_end__ >= __SRAM_segment_start__) && (__stack_svc_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .stack_svc is too large to fit in SRAM memory segment) |
|---|
| 451 |
0x40005a38 __stack_abt_load_start__ = (__stack_svc_end__ ALIGN 0x4) |
|---|
| 452 |
|
|---|
| 453 |
.stack_abt 0x40005a38 0x0 |
|---|
| 454 |
0x40005a38 __stack_abt_start__ = . |
|---|
| 455 |
*(.stack_abt) |
|---|
| 456 |
0x40005a3c . = (((__stack_abt_start__ + __STACKSIZE_ABT__) MAX_K .) ALIGN 0x4) |
|---|
| 457 |
0x40005a38 __stack_abt_end__ = (__stack_abt_start__ + SIZEOF (.stack_abt)) |
|---|
| 458 |
0x00000001 . = ASSERT (((__stack_abt_end__ >= __SRAM_segment_start__) && (__stack_abt_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .stack_abt is too large to fit in SRAM memory segment) |
|---|
| 459 |
0x40005a38 __stack_und_load_start__ = (__stack_abt_end__ ALIGN 0x4) |
|---|
| 460 |
|
|---|
| 461 |
.stack_und 0x40005a38 0x0 |
|---|
| 462 |
0x40005a38 __stack_und_start__ = . |
|---|
| 463 |
*(.stack_und) |
|---|
| 464 |
0x40005a3c . = (((__stack_und_start__ + __STACKSIZE_UND__) MAX_K .) ALIGN 0x4) |
|---|
| 465 |
0x40005a38 __stack_und_end__ = (__stack_und_start__ + SIZEOF (.stack_und)) |
|---|
| 466 |
0x40005a38 __SRAM_segment_used_end__ = ((__stack_abt_end__ ALIGN 0x4) + SIZEOF (.stack_und)) |
|---|
| 467 |
0x00000001 . = ASSERT (((__stack_und_end__ >= __SRAM_segment_start__) && (__stack_und_end__ <= (__SRAM_segment_start__ + 0x8000))), error: .stack_und is too large to fit in SRAM memory segment) |
|---|
| 468 |
START GROUP |
|---|
| 469 |
LOAD ARM RAM Debug/easyweb.o |
|---|
| 470 |
LOAD ARM RAM Debug/EMAC.o |
|---|
| 471 |
LOAD ARM RAM Debug/Retarget.o |
|---|
| 472 |
LOAD ARM RAM Debug/tcpip.o |
|---|
| 473 |
LOAD ARM RAM Debug/catch_irqs.o |
|---|
| 474 |
LOAD ARM RAM Debug/crt0.o |
|---|
| 475 |
LOAD ARM RAM Debug/Philips_LPC230X_Startup.o |
|---|
| 476 |
LOAD ARM RAM Debug/LPC230x.o |
|---|
| 477 |
LOAD ARM RAM Debug/VIC_PL192.o |
|---|
| 478 |
LOAD ARM RAM Debug/VIC_PL192_irq_handler.o |
|---|
| 479 |
LOAD /home/phil/CrossWorks_ARM_1_7/lib/liblpc2000_v4t_a_le.a |
|---|
| 480 |
LOAD /home/phil/CrossWorks_ARM_1_7/lib/libarmdi_v4t_a_le.a |
|---|
| 481 |
LOAD /home/phil/CrossWorks_ARM_1_7/lib/libm_v4t_a_le.a |
|---|
| 482 |
LOAD /home/phil/CrossWorks_ARM_1_7/lib/libc_v4t_a_le.a |
|---|
| 483 |
LOAD /home/phil/CrossWorks_ARM_1_7/lib/libcpp_v4t_a_le.a |
|---|
| 484 |
LOAD /home/phil/CrossWorks_ARM_1_7/lib/libdebugio_v4t_a_le.a |
|---|
| 485 |
LOAD /home/phil/CrossWorks_ARM_1_7/lib/libc_targetio_impl_v4t_a_le.a |
|---|
| 486 |
LOAD /home/phil/CrossWorks_ARM_1_7/lib/lib_vfprintf_long_v4t_a_le.a |
|---|
| 487 |
LOAD /home/phil/CrossWorks_ARM_1_7/lib/lib_vfscanf_long_v4t_a_le.a |
|---|
| 488 |
END GROUP |
|---|
| 489 |
OUTPUT(ARM RAM Debug/EasyWeb.elf elf32-littlearm) |
|---|
| 490 |
|
|---|
| 491 |
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