1 |
/* |
---|
2 |
FreeRTOS V5.4.1 - Copyright (C) 2009 Real Time Engineers Ltd. |
---|
3 |
|
---|
4 |
This file is part of the FreeRTOS distribution. |
---|
5 |
|
---|
6 |
FreeRTOS is free software; you can redistribute it and/or modify it under |
---|
7 |
the terms of the GNU General Public License (version 2) as published by the |
---|
8 |
Free Software Foundation and modified by the FreeRTOS exception. |
---|
9 |
**NOTE** The exception to the GPL is included to allow you to distribute a |
---|
10 |
combined work that includes FreeRTOS without being obliged to provide the |
---|
11 |
source code for proprietary components outside of the FreeRTOS kernel. |
---|
12 |
Alternative commercial license and support terms are also available upon |
---|
13 |
request. See the licensing section of http://www.FreeRTOS.org for full |
---|
14 |
license details. |
---|
15 |
|
---|
16 |
FreeRTOS is distributed in the hope that it will be useful, but WITHOUT |
---|
17 |
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
---|
18 |
FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
---|
19 |
more details. |
---|
20 |
|
---|
21 |
You should have received a copy of the GNU General Public License along |
---|
22 |
with FreeRTOS; if not, write to the Free Software Foundation, Inc., 59 |
---|
23 |
Temple Place, Suite 330, Boston, MA 02111-1307 USA. |
---|
24 |
|
---|
25 |
|
---|
26 |
*************************************************************************** |
---|
27 |
* * |
---|
28 |
* Looking for a quick start? Then check out the FreeRTOS eBook! * |
---|
29 |
* See http://www.FreeRTOS.org/Documentation for details * |
---|
30 |
* * |
---|
31 |
*************************************************************************** |
---|
32 |
|
---|
33 |
1 tab == 4 spaces! |
---|
34 |
|
---|
35 |
Please ensure to read the configuration and relevant port sections of the |
---|
36 |
online documentation. |
---|
37 |
|
---|
38 |
http://www.FreeRTOS.org - Documentation, latest information, license and |
---|
39 |
contact details. |
---|
40 |
|
---|
41 |
http://www.SafeRTOS.com - A version that is certified for use in safety |
---|
42 |
critical systems. |
---|
43 |
|
---|
44 |
http://www.OpenRTOS.com - Commercial support, development, porting, |
---|
45 |
licensing and training services. |
---|
46 |
*/ |
---|
47 |
|
---|
48 |
/* |
---|
49 |
Changes from V3.2.3 |
---|
50 |
|
---|
51 |
+ Modified portENTER_SWITCHING_ISR() to allow use with GCC V4.0.1. |
---|
52 |
|
---|
53 |
Changes from V3.2.4 |
---|
54 |
|
---|
55 |
+ Removed the use of the %0 parameter within the assembler macros and |
---|
56 |
replaced them with hard coded registers. This will ensure the |
---|
57 |
assembler does not select the link register as the temp register as |
---|
58 |
was occasionally happening previously. |
---|
59 |
|
---|
60 |
+ The assembler statements are now included in a single asm block rather |
---|
61 |
than each line having its own asm block. |
---|
62 |
|
---|
63 |
Changes from V4.5.0 |
---|
64 |
|
---|
65 |
+ Removed the portENTER_SWITCHING_ISR() and portEXIT_SWITCHING_ISR() macros |
---|
66 |
and replaced them with portYIELD_FROM_ISR() macro. Application code |
---|
67 |
should now make use of the portSAVE_CONTEXT() and portRESTORE_CONTEXT() |
---|
68 |
macros as per the V4.5.1 demo code. |
---|
69 |
*/ |
---|
70 |
|
---|
71 |
#ifndef PORTMACRO_H |
---|
72 |
#define PORTMACRO_H |
---|
73 |
|
---|
74 |
#ifdef __cplusplus |
---|
75 |
extern "C" { |
---|
76 |
#endif |
---|
77 |
|
---|
78 |
/*----------------------------------------------------------- |
---|
79 |
* Port specific definitions. |
---|
80 |
* |
---|
81 |
* The settings in this file configure FreeRTOS correctly for the |
---|
82 |
* given hardware and compiler. |
---|
83 |
* |
---|
84 |
* These settings should not be altered. |
---|
85 |
*----------------------------------------------------------- |
---|
86 |
*/ |
---|
87 |
|
---|
88 |
/* Type definitions. */ |
---|
89 |
#define portCHAR char |
---|
90 |
#define portFLOAT float |
---|
91 |
#define portDOUBLE double |
---|
92 |
#define portLONG long |
---|
93 |
#define portSHORT short |
---|
94 |
#define portSTACK_TYPE unsigned portLONG |
---|
95 |
#define portBASE_TYPE portLONG |
---|
96 |
|
---|
97 |
#if( configUSE_16_BIT_TICKS == 1 ) |
---|
98 |
typedef unsigned portSHORT portTickType; |
---|
99 |
#define portMAX_DELAY ( portTickType ) 0xffff |
---|
100 |
#else |
---|
101 |
typedef unsigned portLONG portTickType; |
---|
102 |
#define portMAX_DELAY ( portTickType ) 0xffffffff |
---|
103 |
#endif |
---|
104 |
/*-----------------------------------------------------------*/ |
---|
105 |
|
---|
106 |
/* Architecture specifics. */ |
---|
107 |
#define portSTACK_GROWTH ( -1 ) |
---|
108 |
#define portTICK_RATE_MS ( ( portTickType ) 1000 / configTICK_RATE_HZ ) |
---|
109 |
#define portBYTE_ALIGNMENT 4 |
---|
110 |
#define portNOP() asm volatile ( "NOP" ); |
---|
111 |
/*-----------------------------------------------------------*/ |
---|
112 |
|
---|
113 |
|
---|
114 |
/* Scheduler utilities. */ |
---|
115 |
|
---|
116 |
/* |
---|
117 |
* portRESTORE_CONTEXT, portRESTORE_CONTEXT, portENTER_SWITCHING_ISR |
---|
118 |
* and portEXIT_SWITCHING_ISR can only be called from ARM mode, but |
---|
119 |
* are included here for efficiency. An attempt to call one from |
---|
120 |
* THUMB mode code will result in a compile time error. |
---|
121 |
*/ |
---|
122 |
|
---|
123 |
#define portRESTORE_CONTEXT() \ |
---|
124 |
{ \ |
---|
125 |
extern volatile void * volatile pxCurrentTCB; \ |
---|
126 |
extern volatile unsigned portLONG ulCriticalNesting; \ |
---|
127 |
\ |
---|
128 |
/* Set the LR to the task stack. */ \ |
---|
129 |
asm volatile ( \ |
---|
130 |
"LDR R0, =pxCurrentTCB \n\t" \ |
---|
131 |
"LDR R0, [R0] \n\t" \ |
---|
132 |
"LDR LR, [R0] \n\t" \ |
---|
133 |
\ |
---|
134 |
/* The critical nesting depth is the first item on the stack. */ \ |
---|
135 |
/* Load it into the ulCriticalNesting variable. */ \ |
---|
136 |
"LDR R0, =ulCriticalNesting \n\t" \ |
---|
137 |
"LDMFD LR!, {R1} \n\t" \ |
---|
138 |
"STR R1, [R0] \n\t" \ |
---|
139 |
\ |
---|
140 |
/* Get the SPSR from the stack. */ \ |
---|
141 |
"LDMFD LR!, {R0} \n\t" \ |
---|
142 |
"MSR SPSR, R0 \n\t" \ |
---|
143 |
\ |
---|
144 |
/* Restore all system mode registers for the task. */ \ |
---|
145 |
"LDMFD LR, {R0-R14}^ \n\t" \ |
---|
146 |
"NOP \n\t" \ |
---|
147 |
\ |
---|
148 |
/* Restore the return address. */ \ |
---|
149 |
"LDR LR, [LR, #+60] \n\t" \ |
---|
150 |
\ |
---|
151 |
/* And return - correcting the offset in the LR to obtain the */ \ |
---|
152 |
/* correct address. */ \ |
---|
153 |
"SUBS PC, LR, #4 \n\t" \ |
---|
154 |
); \ |
---|
155 |
( void ) ulCriticalNesting; \ |
---|
156 |
( void ) pxCurrentTCB; \ |
---|
157 |
} |
---|
158 |
/*-----------------------------------------------------------*/ |
---|
159 |
|
---|
160 |
#define portSAVE_CONTEXT() \ |
---|
161 |
{ \ |
---|
162 |
extern volatile void * volatile pxCurrentTCB; \ |
---|
163 |
extern volatile unsigned portLONG ulCriticalNesting; \ |
---|
164 |
\ |
---|
165 |
/* Push R0 as we are going to use the register. */ \ |
---|
166 |
asm volatile ( \ |
---|
167 |
"STMDB SP!, {R0} \n\t" \ |
---|
168 |
\ |
---|
169 |
/* Set R0 to point to the task stack pointer. */ \ |
---|
170 |
"STMDB SP,{SP}^ \n\t" \ |
---|
171 |
"NOP \n\t" \ |
---|
172 |
"SUB SP, SP, #4 \n\t" \ |
---|
173 |
"LDMIA SP!,{R0} \n\t" \ |
---|
174 |
\ |
---|
175 |
/* Push the return address onto the stack. */ \ |
---|
176 |
"STMDB R0!, {LR} \n\t" \ |
---|
177 |
\ |
---|
178 |
/* Now we have saved LR we can use it instead of R0. */ \ |
---|
179 |
"MOV LR, R0 \n\t" \ |
---|
180 |
\ |
---|
181 |
/* Pop R0 so we can save it onto the system mode stack. */ \ |
---|
182 |
"LDMIA SP!, {R0} \n\t" \ |
---|
183 |
\ |
---|
184 |
/* Push all the system mode registers onto the task stack. */ \ |
---|
185 |
"STMDB LR,{R0-LR}^ \n\t" \ |
---|
186 |
"NOP \n\t" \ |
---|
187 |
"SUB LR, LR, #60 \n\t" \ |
---|
188 |
\ |
---|
189 |
/* Push the SPSR onto the task stack. */ \ |
---|
190 |
"MRS R0, SPSR \n\t" \ |
---|
191 |
"STMDB LR!, {R0} \n\t" \ |
---|
192 |
\ |
---|
193 |
"LDR R0, =ulCriticalNesting \n\t" \ |
---|
194 |
"LDR R0, [R0] \n\t" \ |
---|
195 |
"STMDB LR!, {R0} \n\t" \ |
---|
196 |
\ |
---|
197 |
/* Store the new top of stack for the task. */ \ |
---|
198 |
"LDR R0, =pxCurrentTCB \n\t" \ |
---|
199 |
"LDR R0, [R0] \n\t" \ |
---|
200 |
"STR LR, [R0] \n\t" \ |
---|
201 |
); \ |
---|
202 |
( void ) ulCriticalNesting; \ |
---|
203 |
( void ) pxCurrentTCB; \ |
---|
204 |
} |
---|
205 |
|
---|
206 |
|
---|
207 |
#define portYIELD_FROM_ISR() vTaskSwitchContext() |
---|
208 |
#define portYIELD() asm volatile ( "SWI 0" ) |
---|
209 |
/*-----------------------------------------------------------*/ |
---|
210 |
|
---|
211 |
|
---|
212 |
/* Critical section management. */ |
---|
213 |
|
---|
214 |
/* |
---|
215 |
* The interrupt management utilities can only be called from ARM mode. When |
---|
216 |
* THUMB_INTERWORK is defined the utilities are defined as functions in |
---|
217 |
* portISR.c to ensure a switch to ARM mode. When THUMB_INTERWORK is not |
---|
218 |
* defined then the utilities are defined as macros here - as per other ports. |
---|
219 |
*/ |
---|
220 |
|
---|
221 |
#ifdef THUMB_INTERWORK |
---|
222 |
|
---|
223 |
extern void vPortDisableInterruptsFromThumb( void ) __attribute__ ((naked)); |
---|
224 |
extern void vPortEnableInterruptsFromThumb( void ) __attribute__ ((naked)); |
---|
225 |
|
---|
226 |
#define portDISABLE_INTERRUPTS() vPortDisableInterruptsFromThumb() |
---|
227 |
#define portENABLE_INTERRUPTS() vPortEnableInterruptsFromThumb() |
---|
228 |
|
---|
229 |
#else |
---|
230 |
|
---|
231 |
#define portDISABLE_INTERRUPTS() \ |
---|
232 |
asm volatile ( \ |
---|
233 |
"STMDB SP!, {R0} \n\t" /* Push R0. */ \ |
---|
234 |
"MRS R0, CPSR \n\t" /* Get CPSR. */ \ |
---|
235 |
"ORR R0, R0, #0xC0 \n\t" /* Disable IRQ, FIQ. */ \ |
---|
236 |
"MSR CPSR, R0 \n\t" /* Write back modified value. */ \ |
---|
237 |
"LDMIA SP!, {R0} " ) /* Pop R0. */ |
---|
238 |
|
---|
239 |
#define portENABLE_INTERRUPTS() \ |
---|
240 |
asm volatile ( \ |
---|
241 |
"STMDB SP!, {R0} \n\t" /* Push R0. */ \ |
---|
242 |
"MRS R0, CPSR \n\t" /* Get CPSR. */ \ |
---|
243 |
"BIC R0, R0, #0xC0 \n\t" /* Enable IRQ, FIQ. */ \ |
---|
244 |
"MSR CPSR, R0 \n\t" /* Write back modified value. */ \ |
---|
245 |
"LDMIA SP!, {R0} " ) /* Pop R0. */ |
---|
246 |
|
---|
247 |
#endif /* THUMB_INTERWORK */ |
---|
248 |
|
---|
249 |
extern void vPortEnterCritical( void ); |
---|
250 |
extern void vPortExitCritical( void ); |
---|
251 |
|
---|
252 |
#define portENTER_CRITICAL() vPortEnterCritical(); |
---|
253 |
#define portEXIT_CRITICAL() vPortExitCritical(); |
---|
254 |
/*-----------------------------------------------------------*/ |
---|
255 |
|
---|
256 |
/* Task function macros as described on the FreeRTOS.org WEB site. */ |
---|
257 |
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void *pvParameters ) |
---|
258 |
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void *pvParameters ) |
---|
259 |
|
---|
260 |
#ifdef __cplusplus |
---|
261 |
} |
---|
262 |
#endif |
---|
263 |
|
---|
264 |
#endif /* PORTMACRO_H */ |
---|
265 |
|
---|